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Browse Prior Art Database

Partial Write Control for Chip Pair Memory Structure

IP.com Disclosure Number: IPCOM000109222D
Original Publication Date: 1992-Aug-01
Included in the Prior Art Database: 2005-Mar-23
Document File: 3 page(s) / 93K

Publishing Venue

IBM

Related People

Aichelmann Jr, FJ: AUTHOR

Abstract

A structure is proposed which provides for a way to support partial write operations without doing a read modify write cycle.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 97% of the total text.

Partial Write Control for Chip Pair Memory Structure

       A structure is proposed which provides for a way to
support partial write operations without doing a read modify write
cycle.

      Memory applications which do not use special on chip function
for gapless transfers require a chip pairs structure.  Fig. 1 depicts
this memory structure which requires a pair of chips to be selected
in parallel.  A gapless transfer results from the ability to select
different low-order addresses providing enough buffering of
sequential request from a target address.  Fig. 2 depicts a by 8 chip
pair for a single bit in 4 ECC words.  By determining which order the
bits are required the appropriate low-order addresses can be
selected.  For example, if the target address requires 10, 12, 14,
and 15 followed by 1', 3', 5', and 7', chip 2 would be supplied with
address 0 while chip 1 would be supplied with address 1.  This
technique enables the memory to supply data faster without gaps or
delaying 157 access.

      This proposal, shown in Fig. 3, extends the capability for
doing partial writes between the chip pairs without requiring a read
modify write cycle.  This is achieved by adding separate read/write
control lines for each chip in the chip pairs structure.  As a
result, these separate read/write controls provide a way to be able
to complete a store into one chip of the chip pairs while the other
goes through a fetch cycle.  This partial write operation does no...