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Parallelizing Software CRC Generation Algorithms Using Many Core Processors

IP.com Disclosure Number: IPCOM000109313D
Publication Date: 2005-Mar-23
Document File: 3 page(s) / 25K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a new technique for parallelizing table-driven, software-based CRC generation algorithms. Benefits include increasing the aggregate processing throughput.

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Parallelizing Software CRC Generation Algorithms Using Many Core Processors

Disclosed is a method for a new technique for parallelizing table-driven, software-based CRC generation algorithms. Benefits include increasing the aggregate processing throughput.

Background

Internet and datacenter applications require reliable and secure transactions at gigabit-per-second rates. To detect the changes of content in transit, a number of server protocols support sophisticated data integrity checks (e.g. iSCSI, SCTP, and RDMA over TCP all use the CRC32c polynomial). Current software-based CRC generation algorithms are compute-intensive, and fail to meet the requirement of high speed (e.g. several Gbps) packet processing for Internet servers.

Current single core table-driven CRC generation algorithms cannot be faster than a certain speed limit (e.g. the lowest processing latency achieved for a single core is 2.15 cycles per byte on a current processor).

General Description

The disclosed method parallelizes table-driven, software-based CRC generation algorithms (see Figures 4-8). These algorithms can run efficiently in a many-core environment. The speed of the CRC generation process in a many-core environment is equal to the speed of a single core multiplied by the number of cores used. A stream is divided into constituent sub-streams. Each core processes a different sub-stream. The stream does not need to be physically divided, and each core simply reads a different set of words from th...