Browse Prior Art Database

Time Division Multiplexed Bus Arbitration

IP.com Disclosure Number: IPCOM000109354D
Original Publication Date: 1992-Aug-01
Included in the Prior Art Database: 2005-Mar-23
Document File: 2 page(s) / 89K

Publishing Venue

IBM

Related People

Andrews, LP: AUTHOR [+5]

Abstract

This article describes a method for use in microprocessor systems to provide bus arbitration with as few lines as possible, and to provide equal priority to the devices for the bus.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Time Division Multiplexed Bus Arbitration

       This article describes a method for use in microprocessor
systems to provide bus arbitration with as few lines as possible, and
to provide equal priority to the devices for the bus.

      Microprocessor systems with multiple bus masters utilize
different bus arbitration schemes to obtain control of the bus.  On
some microprocessors the bus arbitration is performed by the use of
the HOLD and HOLDA lines.  Whenever an external device requires the
bus, the HOLD line is asserted by the device.  The microprocessor
will then respond by asserting HOLDA when the current cycle has
ended.  HOLDA is then used to indicate that the microprocessor is off
the bus and the requesting device may now access the bus.  When
multiple bus masters must arbitrate for the bus, a scheme must be
used to insure no contention.  Another commonly used scheme is the
"daisy chain" method.  Still another solution is the use of external
logic known as a bus arbiter.  All these schemes require more lines
for the arbitration function than the method disclosed herein.

      Fig. 1 illustrates the time division multiplexed bus
arbitration (TDMBA) scheme of this disclosure.  The system clock line
is already available on the bus, so this does not represent an
additional line.  The SYNC signal is used to reset an internal
counter inside every device on the bus.  This internal counter is
clocked by the system clock.  The contents of the counter is compared
with each device's physical address.  The physical address
corresponds to a time slot indicated by the counter.  If the physical
address matches the contents of the counter, then the current time
slot belongs to that device.  At this time the device is a...