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Use of Dynamic Memory Access Asynchronous Communications in the Asynchronous Communications Device Interface

IP.com Disclosure Number: IPCOM000109534D
Original Publication Date: 1992-Sep-01
Included in the Prior Art Database: 2005-Mar-24
Document File: 3 page(s) / 154K

Publishing Venue

IBM

Related People

Fussell, DK: AUTHOR [+2]

Abstract

Many currently available Universal Asynchronous Receiver Transmitter (UART) chips provide a means to transfer data between the UART and computer memory that uses a built-in Dynamic Memory Access (DMA) feature of the UART. Use of this DMA feature means data received via an asynchronous line connection may proceed at a rate many times faster than possible without the DMA feature.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Use of Dynamic Memory Access Asynchronous Communications in the Asynchronous Communications Device Interface

       Many currently available Universal Asynchronous Receiver
Transmitter (UART) chips provide a means to transfer data between the
UART and computer memory that uses a built-in Dynamic Memory Access
(DMA) feature of the UART.  Use of this DMA feature means data
received via an asynchronous line connection may proceed at a rate
many times faster than possible without the DMA feature.

      The Asynchronous Communications Device Interface (ACDI)
implementations provided with current products operate around a
similar procedure.  In this procedure, a UART would receive data off
a communications line into a register or registers on that UART.
When a certain number of characters had been received (exact number
varied with UART, but was never more than 16 characters) the UART
would cause an interrupt to be asserted to the CPU (Central
Processing Unit).  This would initiate processing of the async device
driver's interrupt routine, which would then remove the data from the
UART's registers.  The maximum line speed achieved by ACDI using this
system was 19200 bps.

      The design of the non-DMA UARTs described above has been
standard since the original IBM PC was introduced in the early 1980s.
All software written to drive such UARTs have used variations of the
same approach as described in the above paragraph.

      A UART that is equipped with DMA capabilities can transfer data
across a communications link at speeds significantly greater than
non-DMA UARTS.  This is due to the nature of DMA; data is moved from
the UART to memory without intervention of the CPU.  When the CPU
begins to process the data, it has already been taken out of the UART
registers and copied into memory, thus reducing the processing time
for that data, and allowing processing and data transfer to occur
simultaneously rather than in a mutually exclusive manner.

      The ACDI has been modified to include use of DMA for transfer
of data when it is available in the hardware and desired by the end
user.  These modifications include:
  - A new device driver to operate E16550A UARTs in DMA mode.
  - Enhancements to the ACDI verbs ComSetBitRate and ComRetBitRate to
support the additional line speeds available using DMA.

      The nature of DMA data transfers required significant changes
to the fundamental method of processing in the DMA async device
driver from all previous device drivers.  Since the DMA features of
the UART were designed to be programmed to generate a CPU interrupt
only after relatively large numbers of characters have been received
and transferred into RAM (without CPU intervention), the time spent
by the CPU servicing interrupts is greatly decreas...