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Browse Prior Art Database

I/O Switched Network Using Packet Switches

IP.com Disclosure Number: IPCOM000109556D
Original Publication Date: 1992-Sep-01
Included in the Prior Art Database: 2005-Mar-24
Document File: 3 page(s) / 141K

Publishing Venue

IBM

Related People

Anderson, CJ: AUTHOR

Abstract

This article describes a method of using an Asynchronous Transfer Mode, ATM, or a packet switch in an I/O switch application. The concept is reformatting FCS (Fiber Channel Standard) data formats into ATM packets and how to use tokens to control the priority in the switch. The control of priority is important because it allows the ATM switches to emulate the three classes of FCS data transfer. (Image Omitted)

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

I/O Switched Network Using Packet Switches

       This article describes a method of using an Asynchronous
Transfer Mode, ATM, or a packet switch in an I/O switch application.
The concept is reformatting FCS (Fiber Channel Standard) data formats
into ATM packets and how to use tokens to control the priority in the
switch.  The control of priority is important because it allows the
ATM switches to emulate the three classes of FCS data transfer.

                            (Image Omitted)

      The FCS data format can have frames of data that are 10's of
bytes to about 10K bytes long where the ATM packet switch has a data
format where the frame can only be 64 bytes long.  The ATM packet
switch is self-routing where the switch reads the output address in
the frame and routes the data to the proper output without an
external controller setting the switch.  FCS data coming into a
switched network using an ATM switch will divide the FCS frame into
ATM packets.  The figure shows a high-speed input from a
communications link (i.e., FCS) going to an adapter chip.  The
adapter chip reads the FCS header to determine the FCS frame's
destination, the adapter chip then deter mines the appropriate output
for the ATM block.  The adapter chip breaks the FCS frame up into
packets and adds a header to get the packet through the ATM block
with the proper priority.  An output adapter chip will strip the
headers off and reassemble the FCS frame just like it was as it
entered the input adapter chip and make any additions to the header
required by the FCS protocols.  The figure shows the ATM block has
two switches in parallel to have enough bandwidth for the input plus
overhead of adding the ATM headers.  The ATM block can be expanded
for more I/O or performance.  When the ATM switch is expanded the
buffer performance goes up because each ATM switch chip has a
significant amount of memory.

      Controlling a large circuit switch (100-10,000 nodes) will
require a very high performance processor and data buses to be able
to process all the connection requests in a timely manner.  This
becomes even harder when the switch has remote crosspoints.  By going
to the self-routing of an ATM switch there is no need for a large
central processor.  The routing is determined by the input adapter
chip which has a map of the network in memory.  A controller for the
network...