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Browse Prior Art Database

Foreground State Machine Facility for Multi-channel Data Link Communications

IP.com Disclosure Number: IPCOM000109587D
Original Publication Date: 1992-Sep-01
Included in the Prior Art Database: 2005-Mar-24
Document File: 6 page(s) / 302K

Publishing Venue

IBM

Related People

Eijan, UG: AUTHOR [+4]

Abstract

Described is a software facility which provides foreground state machine functions for a multiple-channel communications adapter to maintain coherence of real-time events in multi-channel communications. In addition, a state machine used for data link communications is described which uses this facility.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 30% of the total text.

Foreground State Machine Facility for Multi-channel Data Link Communications

       Described is a software facility which provides
foreground state machine functions for a multiple-channel
communications adapter to maintain coherence of real-time events in
multi-channel communications.  In addition, a state machine used for
data link communications is described which uses this facility.

      In the processing of events, such as data link layer framing,
the processing required is partitioned into sections or states.  Each
state performs a specific framing function.  This facility, referred
to as code chaining, is used to allow for a dynamic change in the
chaining sequence based on current processing requirements.  Also,
common routines are shared for multiple channel servers for each
channel so as to reduce the instruction memory requirement.  The
implementation provides the following advantages:
      -Elimination of unnecessary branch decoding when entering a
particular routine or state.  An index is used to branch directly to
the current state.
      -States with similar needed functions are used for different
channels.  This reduces instruction memory requirements.
      -Use of data segments allows for a flexible way to change
channel based parameters such as the IDLE pattern.  Each channel may
have a different IDLE pattern.

      Real time processing of data transfers are best accomplished
when program routines are prioritized as foreground and background
routines.  As a result, the concept provides foreground routines
which have a higher priority for periodic processing of the data.
Background routines can be allowed to be processed at a slower rate
than the foreground functions.  The structure of the foreground code
is a chain of states for each channel.  The sequence of routines
being executed are well defined in the flow so as to maximize the
performance of the processors.  The chain is initialized in the
initialization routine by defining a unique branch structure.

      Software coding is separated into transmit and receive
functions where each function is controlled by a microprocessor
forming states that allows for ease of programming.  For the chaining
function, every routine has a base address for the data segment that
it refers to.  The address is programmed to appear in one of the
index registers at the beginning of the routine.  The last
instruction of the routine is a load instruction of the start address
of the next routine.  This address is stored in a predefined location
in the data segment that the present routine is pointing to and is
initialized during the initialization process.  Two digital signal
processors (DSPs) are used, one for transmit and one for receive.
Fig. 1 shows the chaining structure for the transmit DSP and Fig. 2
shows the chaining structure for the receive DSP.

      The structure of the code used in the chaining mechanism is
such that the...