Browse Prior Art Database

Simulation of Horizontally Microcodable Processors

IP.com Disclosure Number: IPCOM000109776D
Original Publication Date: 1992-Sep-01
Included in the Prior Art Database: 2005-Mar-24
Document File: 2 page(s) / 87K

Publishing Venue

IBM

Related People

Azagury, A: AUTHOR [+3]

Abstract

Disclosed is the use of a data base to construct a program that simulates the behavior of a horizontally microcodable processor at the register transfer level, so that the simulation program can easily be changed, or regenerated, in response to changes to the processor design.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Simulation of Horizontally Microcodable Processors

       Disclosed is the use of a data base to construct a
program that simulates the behavior of a horizontally microcodable
processor at the register transfer level, so that the simulation
program can easily be changed, or regenerated, in response to changes
to the processor design.

      The test-bed programs generated simulate the functional
behavior of any horizontally microcoded (HMC) processors.
Time-behavior of the processor is not emulated, only its state at the
end of each HMC control word.  In addition, to simulate program
generation, a separate report generator uses the data base to
construct a report to any appropriate format.  The advantages are:
speed of modification, internal consistency and the re-use of
information compatibly with other tools.

      The scheme employs declarations about the architecture of a
processor and program fragments describing interpretation of
individual fields or particular field values in the construction of a
simulation program.  It also considers a simulation program as a
special kind of report, which can be generated automatically from a
database using a report generator.  Three elements are involved:
first, the use of a database to represent processor architectural
data; second, using the same database to store behaviors describing
the interpretation of each horizontal microcode field; and finally,
the use of a script-driven report generator program to access the
database and to use both architectural and behavioral data to
construct the required simulation program.

      The characteristic of a horizontally microcodable processor is
that its instruction word is divided into distinct fields each of
which may be interpreted more or less independently.  Thus the
architecture displays a considerable structure.  In particular, a
database may be used to store the following kinds of data:
1.   Descriptions of the different kinds of instruction and, for each
instruction, characterized by a particular opcode value and the
division of the instruction into fields...