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Browse Prior Art Database

Rule on Pull Up Resistor Power Source in Multiple Power Supply System

IP.com Disclosure Number: IPCOM000109874D
Original Publication Date: 1992-Sep-01
Included in the Prior Art Database: 2005-Mar-24
Document File: 5 page(s) / 108K

Publishing Venue

IBM

Related People

Narita, I: AUTHOR [+2]

Abstract

Disclosed is a rule on CMOS pull-up resistor power source in a multiple power-supply system. According to the proposed rule, a leakage current from a power supply can be eliminated.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 57% of the total text.

Rule on Pull Up Resistor Power Source in Multiple Power Supply System

       Disclosed is a rule on CMOS pull-up resistor power source
in a multiple power-supply system.  According to the proposed rule, a
leakage current from a power supply can be eliminated.

      Because of the electric characteristics of CMOS devices, the
input voltage of a CMOS device should be settled to a high level or a
low level.  For example, the outputs of some kinds of devices, such
as a tri-state buffer, are generally pulled-up with resistors.

      In Fig. 1, CMOS device 1 is connected to the power source VCC1
and CMOS device 2 is connected to VCC2, and VCC1 is always ON whereas
VCC2 can sometimes be OFF.  Under the condition that VCC1 is ON and
VCC2 is OFF, diodes are provided to the circuit in order to prevent
latch-up in a CMOS device and current flow from VCC1 to VCC2 via R
and D.

      In Fig. 2, VCC1 is ON and VCC2 is OFF.  A parasitic PN diode
arises in the P-ch MOSFET in the CMOS2.  The current leaks from VCC1
into VCC2 via R and D also.

      To eliminate the current leakage, the following solutions are
effective.  In the circuit in Fig. 1, connecting the pull-up resistor
to VCC2 instead of VCC1 solves the current leakage, as shown in Fig.
3.  In this case, the input signal is pulled-up when VCC2 is ON and
no current flow via R and D occurs when VCC2 is OFF if CMOS1 outputs
GND level or high impedance.

      In the circuit in Fig. 2, connecting the...