Browse Prior Art Database

Bit Steering Per Data Bit

IP.com Disclosure Number: IPCOM000109940D
Original Publication Date: 1992-Sep-01
Included in the Prior Art Database: 2005-Mar-25
Document File: 1 page(s) / 65K

Publishing Venue

IBM

Related People

Blake, RM: AUTHOR [+2]

Abstract

This disclosure describes a method by which data, during a fetch operation, can be "steered" from one of two locations for each data output line of a multiple bit output memory device (eg. DRAM or SRAM) and, further, that each output data line can be "steered" independently of the other output data lines.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 56% of the total text.

Bit Steering Per Data Bit

      This disclosure describes a method by which data, during a
fetch operation, can be "steered" from one of two locations for each
data output line of a multiple bit output memory device (eg. DRAM or
SRAM) and, further, that each output data line can be "steered"
independently of the other output data lines.

      Normally, in multiple bit memory devices, the data that is
placed on the output data lines during a fetch operation are related
to each other in the sense that they are all associated with the same
address.  In a typical memory device, the address completely
determines which data will appear on the multiple output data lines
during a fetch operation and normally this relationship of data
cannot be altered.  To achieve greater flexibility in the ordering of
data external to the memory device, it is advantageous to provide a
means that permits each data output line to choose, independently of
the other output lines, one of two possible locations from which to
fetch data.

      This disclosure proposes to implement this capability by the
following means.  Upon initial selection, the memory device, using
the normal address presented to it, internally accesses 2 bits of
data per output data line and buffers this data within the memory
device.  Further, during this initial selection, a "steering vector"
is placed on the data input lines to the memory device.  Each data
input line is associated with a data output line and m...