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Methodology for Building Tuneable Integrated Low Pass Analog Filters

IP.com Disclosure Number: IPCOM000109997D
Original Publication Date: 1992-Oct-01
Included in the Prior Art Database: 2005-Mar-25
Document File: 4 page(s) / 167K

Publishing Venue

IBM

Related People

Buchholtz, TC: AUTHOR [+3]

Abstract

Applications which require precision, high-speed filtering often end up with hand-picked discrete implementations, which must be tuned to certain desired characteristics. Such discrete solutions are incapable of tracking the characteristics recisely due to the effects of temperature, component drift, and the unpredictable influence of card parasitics. This article offers a method for building a high-order, low-pass filter in an integrated environment with filter characteristics that are capable of tracking out temperature and power supply variations and which are insensitive to card parasitics. The disclosed methodology utilizes a unique topology which maintains a midband gain of unity and minimizes signal distortion of filtered waveforms.

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Methodology for Building Tuneable Integrated Low Pass Analog Filters

       Applications which require precision, high-speed
filtering often end up with hand-picked discrete implementations,
which must be tuned to certain desired characteristics.  Such
discrete solutions are incapable of tracking the characteristics
recisely due to the effects of temperature, component drift, and the
unpredictable influence of card parasitics.  This article offers a
method for building a high-order, low-pass filter in an integrated
environment with filter characteristics that are capable of tracking
out temperature and power supply variations and which are insensitive
to card parasitics.  The disclosed methodology utilizes a unique
topology which maintains a midband gain of unity and minimizes signal
distortion of filtered waveforms.  The methodology is illustrated
through the construction of a 7th-order, low-pass Butterworth filter.
Included with the filter are two control circuits required to achieve
stable cut-off frequency and filter Q's.

      Fig. 1 shows a block diagram of the filter and associated
control loops.  The data is arranged in three rows.  The top row
makes up the 7th-order Butterworth, the second row the frequency
control, and the third row the Q-control.

      The Butterworth filter is modeled after a Sallen and Key
positive feedback, low-pass circuit.  A second-order section is shown
in Fig. 2, also referred to in the literature as a KRC low-pass.  The
KRC filter configuration has a number advantages over other filtering
techniques.  Since any Q can be achieved with an amplifier gain of
less than 3, the design of stable, high bandwidth amplifiers
requiring no feedback is easily accomplished.  In addition,
high-frequency filtering requires small RC time constants which lends
itself to the resistances and capacitances found in an integrated
environment.  Most importantly, however, the KRC filter topology
decouples filter corner frequency and filter Q, allowing for
independent control in feedback loops.

      A 7th-order Butterworth can be constructed by cascading 3 such
second-order sections and 1 pole from a simple RC network.  Each
stage is buffered and tuned to the appropriate corner frequency and
Q.  In this case, the poles are located, equally spaced, on a circle
of radius W0.  Since the order of the filter is odd, one of the poles
lies on the real axis and the other 6 poles are formed from complex
conjugate pairs separated on the W0 circle by 25.7 degrees.  The Q's
of the complex conjugate pole pairs are .55, .82, and 2.22.  In Fig.
1, the order of the filter sections was chosen carefully to provide
for the best possible signal-to-noise ratio while keeping the signals
into the sections within their linear regions.  A haphazard ordering
can result in signal distortion due to either peaking of high-Q
sections or over attenuation of low-Q sections for signal frequencies
near the filter corner frequen...