Browse Prior Art Database

Fast Frame Relay Routing Scheme

IP.com Disclosure Number: IPCOM000110092D
Original Publication Date: 1992-Oct-01
Included in the Prior Art Database: 2005-Mar-25
Document File: 2 page(s) / 55K

Publishing Venue

IBM

Related People

Ferris, M: AUTHOR [+3]

Abstract

Disclosed is a frame relay routing scheme that supports T3 media speeds of 44.736 megabits per second full-duplex. In addition, the scheme approaches 100% line utilization if a Gaussian distribution of packet sizes is assumed.

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This is the abbreviated version, containing approximately 69% of the total text.

Fast Frame Relay Routing Scheme

       Disclosed is a frame relay routing scheme that supports
T3 media speeds of 44.736 megabits per second full-duplex.  In
addition, the scheme approaches 100% line utilization if a Gaussian
distribution of packet sizes is assumed.

      Traditionally, routing techniques are implemented in both
hardware and software, as shown in Fig. 1.  The hardware receives a
frame, reads a Content Addressable Memory (CAM) to locate the
information about the destination port, and sends the information to
an external micro- processor.  Then the microprocessor determines the
type of protocol to be used, decides if the frame must be routed to
another processor, updates statistics, and routes the frame to the
correct physical port.

      The routing performance is particularly impacted by the use of
this external microprocessor for the following reasons.  First, the
relatively fast receiving hardware must pass the CAM information to
an external processor, thus adding an extra step to the process
instead of doing the routing itself.  Second, the microprocessor is
inherently slower than the receiving hardware.  Third, the
microprocessor contains code for several protocols, so the
performance is decreased by the overhead of decoding protocol
information.

      The scheme disclosed, shown in Fig. 2, eliminates these three
detriments to performance.  The microprocessor is replaced by a pico-
processor imbedded in silicon with the receiv...