Browse Prior Art Database

Use of an Associative Memory Scheme for Large RAM/ROM Simulation Models

IP.com Disclosure Number: IPCOM000110102D
Original Publication Date: 1992-Oct-01
Included in the Prior Art Database: 2005-Mar-25
Document File: 2 page(s) / 84K

Publishing Venue

IBM

Related People

Martin Jr, KE: AUTHOR

Abstract

Disclosed is a programming technique applicable to the modelling of large memory devices used in the software simulation of digital electronic systems. It uses an associative memory scheme to link the model's memory address with its data. This allows the full address space of the modelled device to be accessible while using a relatively small amount of internal model storage. The storage requirement is dependent on the number of unique memory addresses to be accessed during a simulation exercise, not the size of the address space.

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Use of an Associative Memory Scheme for Large RAM/ROM Simulation Models

       Disclosed is a programming technique applicable to the
modelling of large memory devices used in the software simulation of
digital electronic systems.  It uses an associative memory scheme to
link the model's memory address with its data.  This allows the full
address space of the modelled device to be accessible while using a
relatively small amount of internal model storage.  The storage
requirement is dependent on the number of unique memory addresses to
be accessed during a simulation exercise, not the size of the address
space.

      This modeling technique applies to any memory device that
accepts a unique address to store and retrieve data.  The figure
illustrates the technique as applied to a memory device with a j-bit
address bus and a k-bit data bus.  It uses two arrays of size MAX
referenced via a common index variable, one to store the address
(ADDR) and the other to store the data (DATA).

      When the memory model is addressed during simulation it reads
the incoming address value from the address bus and then scans its
ADDR array from INDEX=0,1,...LAST to search for a matching address.
(LAST represents the last occupied position in the ADDR array and is
initialized to 0).  Scanning stops when either the address is matched
or INDEX=LAST.  (This example illustrates a linear search technique,
but more sophisticated techniques could be applied to accelerate the
array scan).

      If an address match is found at INDEX=m, then the corresponding
data array position is used to store or retrieve the data (i.e.,
DATA(m) = data or data = DATA(m)).  However, if no match is found,
then the model does one of the following:
1.   If LAST=(MAX-1), then a model error occurs because the
simulation attempted to access more than...