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Cross Coupled Gates Synchronous Rectifier

IP.com Disclosure Number: IPCOM000110176D
Original Publication Date: 1992-Sep-01
Included in the Prior Art Database: 2005-Mar-25
Document File: 2 page(s) / 109K

Publishing Venue

IBM

Related People

Strusz, HP: AUTHOR

Abstract

Disclosed is a circuit design method to reduce output rectifier drop in small power supplies, increase supply efficiency, and simplify transformer winding requirements.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Cross Coupled Gates Synchronous Rectifier

       Disclosed is a circuit design method to reduce output
rectifier drop in small power supplies, increase supply efficiency,
and simplify transformer winding requirements.

      As logic voltages become lower (5 V - 3.3 V - 2.5 V), power
supply output diode drop becomes a very significant portion of a
supply's total losses.  The use of a new 10-milliohm MOSFET
(Siliconix SMP6ONO3-10L) in rectifier circuits of 20 amps output, or
so, will cause a voltage loss of less than 0.2 volts, as compared to
0.50 V for a Shottky diode, or 0.8 V for a typical silicon diode.
Using the FET as a synchronous rectifier enhances a supply's
efficiency greatly.  This is especially advantageous for card-mounted
power supplies, where the supply's losses are part of the card's
cooling load.

      Further size and cost gains can be obtained by using the FET's
bidirectional conduction property.  This useful characteristic is the
ability for the FET's drain to conduct with less than 10 milliohms of
resistance regardless of its polarity, as long as the gate is
positive in excess of the threshold voltage, with respect to the
source.

      Observing the schematic, the transformer is center-tapped, with
the CT, the positive output of the supply through the appropriate
freewheeling clamp diode (if necessary), choke, and output cap.  Note
that the FET sources are tied to power ground (-supply), and their
drains are tied to the secondary of the output transformer.  The
gates are cross...