Browse Prior Art Database

Improved Selective Tungsten M-zero Process for Borderless Interconnects

IP.com Disclosure Number: IPCOM000110180D
Original Publication Date: 1992-Sep-01
Included in the Prior Art Database: 2005-Mar-25
Document File: 2 page(s) / 144K

Publishing Venue

IBM

Related People

Basavaiah, S: AUTHOR [+6]

Abstract

Disclosed is a process to provide a low sheet-rho M-zero borderless interconnect for bipolar, CMOS and BiCMOS applications. The approach presented here overcomes many of the difficulties associated with conventional selective W M-zero processes by simplifying the patterning of the "seed layer" for nucleating selective W growth, minimizing any lateral expansion of the M-zero lines and greatly reducing the possibility of bridging across adjacent metal lines.

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Improved Selective Tungsten M-zero Process for Borderless Interconnects

       Disclosed is a process to provide a low sheet-rho M-zero
borderless interconnect for bipolar, CMOS and BiCMOS applications.
The approach presented here overcomes many of the difficulties
associated with conventional selective W M-zero processes by
simplifying the patterning of the "seed layer" for nucleating
selective W growth, minimizing any lateral expansion of the M-zero
lines and greatly reducing the possibility of bridging across
adjacent metal lines.

      For fabrication of high-density CMOS, BiCMOS and bipolar VLSI
circuits, it is highly desirable to have a local interconnect
(M-zero) which is formed of patterned right after device fabrication
and before proceeding through the standard metallization processes.
The ideal M-zero should provide a low-sheet rho local interconnect
which must be patterned over the device topography, and ideally it
should be borderless to all parts of the different devices.  It
should also be able to achieve a pitch which is limited only by the
lithographic ground rules.  For M-zero interconnects which do not
rely on selective film growth the main difficulties lie in patterning
the metal film over the device topography without affecting the
devices themselves, and in obtaining a reliable metal interconnect
over topography with a low resistance and high reliability.
Processes relying on selective film growth avoid some of these
difficulties, but introduce their own problems, including linewidth
bias and/or bridging between adjacent lines or adjacent device areas,
problems associated with patterning the seed layer for selective
growth (which defines the M-zero lines), and problems with
maintaining complete selectivity for high yields.

      Disclosed here is a process which uses selective tungsten to
provide a local interconnect but circumvents many of the problems
involved with conventional selective M-zero processes.  The process
proceeds as follows: after device formation and silicidation, a
blanket layer of TiN (or other suitable metal) is deposited (if
overpasses over salicided gates are requi...