Browse Prior Art Database

Setup Method for a Second Serial Port

IP.com Disclosure Number: IPCOM000110191D
Original Publication Date: 1992-Oct-01
Included in the Prior Art Database: 2005-Mar-25
Document File: 1 page(s) / 49K

Publishing Venue

IBM

Related People

Klim, PJ: AUTHOR [+4]

Abstract

Disclosed is a method allowing a second serial port of a computer to be set up as part of the Power-On Setup (POS) procedure of an I/O controller chip having embedded POS registers for the port.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 87% of the total text.

Setup Method for a Second Serial Port

      Disclosed is a method allowing a second serial port of a
computer to be set up as part of the Power-On Setup (POS) procedure
of an I/O controller chip having embedded POS registers for the port.

      Bits 5, 6, and 7 of Planar POS Port 94H each enable or disable
a group of addresses 100H through 107H, which permit the set up of
various devices internal or external to the I/O controller chip.
With the Power On Reset (POR) signal, all bits of Port 94H come up as
logical ones, disabling the setup addresses of the I/O controller
chip.

      As shown in the figure, POS Port 102H includes a register 12,
the setting of which is enabled by bit 7 of Port 94H, and a register
13, the setting of which is enabled by bit 6 of Port 94H.  During the
power-on sequence, bit 7 of Port 94H register 10 is set to zero,
bringing the I/O controller chip into Setup Level A, so that POS Port
102H register 12 can be addressed to set bit 0 of this register, the
MASTER SLEEP bit, to one, as required to activate Serial Port B 14.
As the power-on sequence continues, Port 94H bit 6 is set to zero,
placing the I/O controller chip in Setup Level B.  At this point,
bits 1 and 4 of the Port 102H register 13 are addressed, with bit 4
being set to one to enable serial port B 14.  Bit 1 of register 13
is set to zero if Serial Port B 14 interrupts at level 3, or to
one if this Port 14 interrupts at level 4.

      The serial COM selection function...