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SOI Bipolar Structure and the Fabrication Processes for Same

IP.com Disclosure Number: IPCOM000110239D
Original Publication Date: 1992-Nov-01
Included in the Prior Art Database: 2005-Mar-25
Document File: 4 page(s) / 160K

Publishing Venue

IBM

Related People

Burghartz, JN: AUTHOR [+3]

Abstract

We disclose a new SOI bipolar structure with a very low resistance silicided extrinsic base contact which is self-aligned to the collector window, and a very low resistance buried collector contact which can be metal or refractory silicide. The structure is especially effective for reducing the parasitic resistance and capacitance of Si or SiGe epitaxial-base bipolar devices. The structure can be extended to SOI BiCMOS. Methods to fabricate such structures are described.

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SOI Bipolar Structure and the Fabrication Processes for Same

       We disclose a new SOI bipolar structure with a very low
resistance silicided extrinsic base contact which is self-aligned to
the collector window, and a very low resistance buried collector
contact which can be metal or refractory silicide.  The structure is
especially effective for reducing the parasitic resistance and
capacitance of Si or SiGe epitaxial-base bipolar devices.  The
structure can be extended to SOI BiCMOS.  Methods to fabricate such
structures are described.

      The proposed low-parasitic bipolar device structure on SOI has
several unique features as shown in Fig. 1, namely:
1.  A low resistance extrinsic base contact which is self-aligned to
the collector pedestal by a spacer.  The bottom layer of this
extrinsic base contact is a low resistance refractory metal silicide
that can withstand high temperature device fabrication processes.
The top layer is high quality single-crystal silicon which serves as
a cap to prevent contamination and ease device fabrication, e.g., no
metal silicide will be exposed during the cleaning of the surface
before low temperature epitaxy for the base formation.  This top
Layer may be doped by implantation, while the underlying silicide can
be a fast diffusion path that allows the extrinsic base doping
impurities to reach the bottom insulator and passivate the interfaces
between the silicide, the collector and the isolation.  Or, one can
dope the top layer from the bottom silicide layer by implanting the
dopant impurities into the silicide before SOI formation and
eliminate the extra extrinsic base implant and associated implant
damages.  Since the silicide is self-aligned (by a spacer) to the
collector pedestal which is in turn within one lithographic overlay
of the emitter opening, the base resistance is kept very low without
extrinsic base encroachment concerns.
2.  A highly conductive buried collector contact and/or local
interconnect.  Refractory metal or refractory metal silicide is
formed directly under the device to serve as a very  low resistance
collector contact and buried local interconnect.  This metal layer
also helps heat removal and chip cooling.  It is also encapsulated by
the surrounding silicon and insulator layers during subsequent device
fabrication steps.

      Some additional advantages include:
      o   Both the extrinsic base and the collector contacts reside
on insulator layers.  CCB and CCS are therefore reduced to a minimum.
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