Browse Prior Art Database

Chip Burn-in Accomplished at the Wafer Level

IP.com Disclosure Number: IPCOM000110293D
Original Publication Date: 1992-Nov-01
Included in the Prior Art Database: 2005-Mar-25
Document File: 2 page(s) / 93K

Publishing Venue

IBM

Related People

Schrottke, GM: AUTHOR

Abstract

Burn-in of chips prior to wafer dicing is accomplished so that chips that are relatively free of chip infant mortality defects can be supplied to manufacturers of multi-chip modules (MCMs).

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Chip Burn-in Accomplished at the Wafer Level

       Burn-in of chips prior to wafer dicing is accomplished so
that chips that are relatively free of chip infant mortality defects
can be supplied to manufacturers of multi-chip modules (MCMs).

      To accomplish manufacturing of multi-chip modules which use
bare chips on a carrier, it is required that the chips be burned-in
prior to mounting.  This is done to reduce the high infant mortality
failure rates of integrated circuit (IC) devices.  The failure rate
for an MCM is the cumulative multiplicative product of the failure
rates for the individual chips in the module, and, consequently, the
failure rates for an MCM containing only a small number of chips soon
become so high that manufacture of the module is not economical.

      The problem is solved for today's assembly technology by
burning-in either packaged devices or the modules themselves, the
latter case necessitating a difficult rework process.  This is done
by subjecting the devices to a high temperature environment and
supplying electrical signals and power to the chips (module) as
required.  The chips are exercised for a period of time to weed out
the weak devices.

      Chip burn-in at the wafer level can be accomplished by
accessing and powering the chips using probes, and heating the chips
with thermodes through the back of the wafer or placing the wafer and
test setup in a temperature-controlled oven.  The high cost of
complex probe systems dictates that this be done one chip at a time,
a time-consuming process.  The invention that will be described
herein will show a technique for wafer burn-in, with electrical
access supplied on a flex cable brought out past the edge of the
wafer where its I/O can be easily accessed.  The cable also provides
wiring distribution layers so that the pads of several chips can be
powered and the...