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Software Interface for Non-aligned Transfers

IP.com Disclosure Number: IPCOM000110305D
Original Publication Date: 1992-Nov-01
Included in the Prior Art Database: 2005-Mar-25
Document File: 4 page(s) / 184K

Publishing Venue

IBM

Related People

Ratcliff, BH: AUTHOR

Abstract

Many hardware devices used in the transferring of data require the starting source and destination addresses to begin on specific boundaries, mostly four-byte boundaries. This article describes a software interface which eliminates this hardware restriction. The user will no longer be required to copy all the data into an aligned buffer prior to programming the hardware device to perform the data transfer. For purpose of example, this article specifically describes the software interface used with the MIC (MICRO CHANNEL* Interface Controller). The MIC has a hardware restriction which requires the source and destination addresses of the data to be aligned on a four-byte boundary.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 36% of the total text.

Software Interface for Non-aligned Transfers

       Many hardware devices used in the transferring of data
require the starting source and destination addresses to begin on
specific boundaries, mostly four-byte boundaries.  This article
describes a software interface which eliminates this hardware
restriction.  The user will no longer be required to copy all the
data into an aligned buffer prior to programming the hardware device
to perform the data transfer.  For purpose of example, this article
specifically describes the software interface used with the MIC
(MICRO CHANNEL* Interface Controller).  The MIC has a hardware
restriction which requires the source and destination addresses of
the data to be aligned on a four-byte boundary.

      The MIC chip is used to transfer data across the MICRO CHANNEL.
The MIC chip resides on an adapter card and is used to transfer data
from adapter to adapter, system memory to adapter or adapter to
system memory.  The MIC contains various registers which are
programmed by the adapter microcode to control the data transfers.

      A hardware restriction of the present MIC chip (version 1.1) is
the source and destination addresses of the data to be transferred
must be on a four-byte boundary.  The data length must also be a
four-byte multiple.  Many applications do not guarantee the data will
always be aligned on a four-byte boundary.  This required the data to
be copied to a 4-byte aligned buffer area before being transferred by
the MIC.  By copying the data, latency was added to the transfer
process which greatly impeded the system performance and added extra
utilization to the system processor.

      When a MIC request is issued and the source data is not aligned
on a 4-byte boundary, the source address is changed to the previous
4-byte boundary.  At the end of the destination buffer, a control
area is built which contains an offset and length field.  To assure
the control area is not overlaid, it is built in the destination
buffer at an offset which is larger than the maximum frame size that
can be transmitted from the HOST.  The control area format using C
language structures is as follows:
      struct control_info
         {
           BIT16 flags;
           BIT16 num_items;
           BIT16 dma_copy_length;
           BYTE  unaligned_index;
           BYTE  unused;
           MICITEM(10);
         }
      typedef struct micitem
                 {
                   BIT32 address;
                   BIT16 length;
                   BYTE  offset;
                   BYTE  flags;
                 } MICITEM;

      The control_info structure is imbedded within each destination
buffer.  The destination buffers can always be guaranteed to align on
four-byte boundaries.  the struc...