Browse Prior Art Database

ICO Control Voltage Calibration Scheme with Zone Bit Recording Capability

IP.com Disclosure Number: IPCOM000110326D
Original Publication Date: 1992-Nov-01
Included in the Prior Art Database: 2005-Mar-25
Document File: 2 page(s) / 99K

Publishing Venue

IBM

Related People

Galbraith, RL: AUTHOR [+6]

Abstract

A method for locking a phase-locked loop while maintaining the control voltage within the middle of its operating range is disclosed. A calibration technique is described which maximizes the control voltage operating range.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

ICO Control Voltage Calibration Scheme with Zone Bit Recording Capability

       A method for locking a phase-locked loop while
maintaining the control voltage within the middle of its operating
range is disclosed.  A calibration technique is described which
maximizes the control voltage operating range.

      In order to center the control voltage of the
current-controlled oscillator (ICO) control loop, a digital to analog
converter (DAC), a comparator and counter are added to a conventional
phase-locked loop (PLL).  A DAC-controlled current source is added to
adjust the current in the ICO such that the ICO frequency matches
that of the reference, while maintaining the control voltage in the
middle of the control voltage range.  This would allow for maximum
variation in control voltage when reading disk data without running
into the clamps which limit the range.

      The operation of the diagram will now be described.  When the
chip is powered up, one of the first things that needs to be done is
to set the ICO frequency.  The counter sets all of the DAC bits to 0
which minimizes the current to the ICO from the control buffer.  With
minimal current, the ICO will run slow, compared to the reference.
The phase detector will tell the timing DAC to charge up the control
voltage in order to increase current to the ICO and thus increase its
frequency.  Initially, the control voltage will increase until it
runs into the top clamp.  A comparator monitors the control voltage
with respect to a reference voltage set at the middle of the clamp
range.  With the control voltage above the reference, the comparator
output will be high.  A high comparator output tells the counter to
increment.  Increase in counter value increases the current sent to
the ICO by the control buffer.  Eventually, the count will get high
enough where the ICO frequency will equal that of the crystal with
the control voltage at the top clamp.  As the counter continues to
advance, the frequency of th...