Browse Prior Art Database

Programmable Fairness Level for Floppy Disk Controllers

IP.com Disclosure Number: IPCOM000110377D
Original Publication Date: 1992-Nov-01
Included in the Prior Art Database: 2005-Mar-25
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Klim, P: AUTHOR [+2]

Abstract

Described is a hardware logic implementation that provides a programmable fairness level for floppy disk controllers (FDCs) as used in personal computer (PC) systems equipped with the MICRO CHANNEL (MC).

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This is the abbreviated version, containing approximately 79% of the total text.

Programmable Fairness Level for Floppy Disk Controllers

       Described is a hardware logic implementation that
provides a programmable fairness level for floppy disk controllers
(FDCs) as used in personal computer (PC) systems equipped with the
MICRO CHANNEL (MC).

      In prior art, PC direct memory access (DMA) operations required
that the FDC compete for the MC bus by way of the arbitration bus.
The internal first-in, first-out (FIFO) of the FDC may be enabled
such that the floppy disk will operate in the burst mode.  The MC
architecture is such that all device bursting will support fairness.
When programmed for fairness, the FDC will vacate the bus upon being
preempted after completing its current cycle.  The FDC local arbiter
latches itself in an inactive state and may not participate in any
arbitration cycle until PREEMPT goes inactive.  Upon sensing PREEMPT
inactive, the FDC local arbiter will leave the inactive state.  The
concept described herein provides a means whereby the floppy disk
controller is provided a fairness level upon power on reset so as to
enable the fairness to be reprogrammed during power on system (POS)
operations that are not fair.

      The figure shows the architectural logic diagram for the floppy
fairness register.  The fairness register bit may be accessed by way
of POS registers only.  Access to the fairness bit register is
provided by way of two different system-dependent POS bits.  A
programming bit, bit 6 for Mod...