Browse Prior Art Database

Circuit for Reduction of Write Recovery Time on Hard Disk Drive

IP.com Disclosure Number: IPCOM000110521D
Original Publication Date: 1992-Dec-01
Included in the Prior Art Database: 2005-Mar-25
Document File: 2 page(s) / 61K

Publishing Venue

IBM

Related People

Kubota, T: AUTHOR

Abstract

Disclosed is a circuit for reduction of write recovery time which is required for a read circuit on a hard disk drive to recover to a normal state after a write operation. This circuit is quite simple, consisting of only 4 parts; however, it contributes to decreasing a significant amount of overhead between user sectors so that the available bytes for the user sectors can be increased.

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Circuit for Reduction of Write Recovery Time on Hard Disk Drive

       Disclosed is a circuit for reduction of write recovery
time which is required for a read circuit on a hard disk drive to
recover to a normal state after a write operation.  This circuit is
quite simple, consisting of only 4 parts; however, it contributes to
decreasing a significant amount of overhead between user sectors so
that the available bytes for the user sectors can be increased.

      Fig. 1 shows the circuit schematic.  A write gate (WG)(1)
indicates low level at write operations, high level at read
operations.  An arm electronics (AE)(2) reverses head current at
every falling edge of write pulse (3) while the WG is in low.  Assume
that a hard disk controller (HDC)(4) completes a write operation when
a write pulse is just issued, as shown in Fig. 2.  Without the
proposed circuit, the WG from the HDC goes directly to the AE, which
switches the AE from write to read at the moment the head current is
reversed.  This may cause a large transient on a read back signal (5)
because a flyback voltage appears on the head at the moment of head
current change, and the AE will read this large voltage and propagate
it to a pulse detector (6).  Once suffered the transient, the pulse
detector takes a much longer time to recover to its normal state,
which is often extended to tens of microseconds.

      The proposed circuit in Fig. 1 prevents the AE from being
switched to read mode while th...