Browse Prior Art Database

Processor Detection Circuit

IP.com Disclosure Number: IPCOM000110610D
Original Publication Date: 1992-Dec-01
Included in the Prior Art Database: 2005-Mar-25
Document File: 3 page(s) / 122K

Publishing Venue

IBM

Related People

Davis, TH: AUTHOR [+4]

Abstract

Various microprocessors, such as the Intel 80486DX, 80486SX and 80487SX microprocessors, have pinouts with different signals which generally require different socket designs to receive the pins of the respective microprocessors. A processor detection circuit (PDC) is described whereby a single socket design accepts any of the three different microprocessors with the addition of a programmable array logic circuit.

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This is the abbreviated version, containing approximately 52% of the total text.

Processor Detection Circuit

       Various microprocessors, such as the Intel 80486DX,
80486SX and 80487SX microprocessors, have pinouts with different
signals which generally require different socket designs to receive
the pins of the respective microprocessors.  A processor detection
circuit (PDC) is described whereby a single socket design accepts any
of the three different microprocessors with the addition of a
programmable array logic circuit.

      The pinout signal differences for the various microprocessors
are indicated in Table 1, where the assigned signals ignore numeric
error (IGNNE#), non-maskable interrupt (NMI) and floating point error
(FERR#), along with no connect (NC), and the pin numbers are
identified.
   Pin Number__________80486DX________80486SX________80487SX
          A13             NC               NC         FERR
          A15             IGNNE     NMI        IGNNE
          B15             NMI              NC            NC
          C14             FERR     NC            NC
                           Table 1

      These pinout changes normally required a design which used
different microprocessor layouts or multiple sockets.  The commonly
accepted method for handling an 80486SX design which is compatible
with the 80487SX design is to use two different sockets.  One of the
sockets is used for the 80486SX and second socket is used to
optionally install the 80487SX.  Since the 80487SX is actually a
fully functional 80486 microprocessor, it has a special pin which is
used to disable the 80486SX.  By using the processor detection
circuit a card design may be provided which requires only one socket.
When an 80487SX is to be installed, the 80486SX is removed and the
80487SX is inserted into the original socket.  A Power-On Self Test
(POST) detects the presence of the 80487SX and sets appropriate
select bits in a register and the processor detection circuit
switches the pin definitions of the socket to match the 80487SX.  In
a similar manner, POST can set the select bits to allow the processor
detection circuit to match the pinouts of the 80486DX or the
80486DX2, which latter two microprocessors have the same pinouts.

      The processor detection circuit may be implemented in a
standard programmable array logic device (PAL) which uses two
processor select inputs, PSEL1 and PSEL2, derived from a
status/controller register on the processor card.  When the select
inputs are set by POST, the processor detection circuit maps the
FERR#, IGNNE     and NMI signals as indicated in Table 2, with the
schematic drawing of the processor detection circuit shown in Fig. 1.
   PSEL1_PSEL0____80...