Browse Prior Art Database

Means for Providing Video Set-up Options

IP.com Disclosure Number: IPCOM000110644D
Original Publication Date: 1992-Dec-01
Included in the Prior Art Database: 2005-Mar-25
Document File: 2 page(s) / 62K

Publishing Venue

IBM

Related People

Clarke, GL: AUTHOR [+4]

Abstract

Disclosed are means for providing set-up options for several types of video controllers within a single I/O controller chip.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 58% of the total text.

Means for Providing Video Set-up Options

       Disclosed are means for providing set-up options for
several types of video controllers within a single I/O controller
chip.

      Video devices are set up during a power-on sequence by setting
bit 5 in Port 94H to zero, and then by writing to addresses 100H
through 107H.  Each bit in Port 94H enables or disables a group of
addresses 100H through 107H, which permit the set up of various
devices internal or external to the I/O controller chip.

      As shown in the figure, a VIDEO SETUP signal is derived as an
output of a selector circuit 10, which provides an output having the
level of its input A when the level of its input G is zero, and
equal to the level of its input B when the level of its input G
is one.

      With power-on reset, all bits in Port 94H are brought up at one
levels, so that set-up addresses are disabled, and Bit 2 in Port 104H
is set to zero.

      To enable a static mode of video set-up, Bit 5 of Port 94H is
set to zero, driving the input A of logic gate 10 to zero.  Bit 2
in Port 104H remains at zero, so selector circuit 10 holds the VIDEO
SETUP output at a low level.  This mode is used by video controllers
which are able to handle their own decoding of addresses 100H through
107H.

      A pulsed mode is used for video controllers, such as the VGA
(Video Gate Array) controller, which only decode the three
lower-order address bits.  To enable this mode, Bit 6 of Port 94H...