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A Method of Asynchronously Invoking a Hardware Logic Simulator Debugger

IP.com Disclosure Number: IPCOM000110696D
Original Publication Date: 1992-Dec-01
Included in the Prior Art Database: 2005-Mar-25
Document File: 1 page(s) / 61K

Publishing Venue

IBM

Related People

Hoffman, H: AUTHOR

Abstract

Disclosed is a method to asynchronously invoke a debug tool during hardware logic simulations. When using a hardware logic simulator, it is often convenient to invoke a debug tool in order to trace logic networks or display gate values.

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A Method of Asynchronously Invoking a Hardware Logic Simulator Debugger

      Disclosed is a method to asynchronously invoke a debug tool
during hardware logic simulations.  When using a hardware logic
simulator, it is often convenient to invoke a debug tool in order to
trace logic networks or display gate values.

      Often, even during interactive simulation, this requires a user
to pre-plan the invocation, by specifying at start-up some simulation
event or time at which the debug tool should be invoked.  In other
cases, the simulator must either run under the debug tool (where the
debug tool calls the simulator), or turn control over to the
debugger, so that the debugger then calls the simulator to perform
discrete functions and then returns to the debugger.

      The method described here uses the break key to cause an
operating system break interrupt signal, which is caught by the
simulator.  The simulator then allows the user to enter the debugger
at that point, to examine the logic, trace nets, or display and alter
values.  After finishing, the user then ends the debugger, upon which
the user can terminate simulation, or return to the exact interrupt
point and continue the simulation exactly as before the break.

      The uniqueness of this method is twofold: 1) For simulator
debug, it allows the simulator to run completely normally, but still
allows examination of the logic on demand, without needing to
pre-schedule the debugger, as well as a...