Browse Prior Art Database

Switchable Mapping of I/O Card Registers into I/O or Memory Space

IP.com Disclosure Number: IPCOM000110860D
Original Publication Date: 1994-Jan-01
Included in the Prior Art Database: 2005-Mar-26
Document File: 2 page(s) / 69K

Publishing Venue

IBM

Related People

Dotson, MW: AUTHOR [+6]

Abstract

Disclosed is a method for programmable selection of whether I/O card registers are mapped by the hardware to either the bus I/O space or memory space. Likewise, the same concept permits the mapping card memory to either the bus I/O space or memory space.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Switchable Mapping of I/O Card Registers into I/O or Memory Space

      Disclosed is a method for programmable selection of whether I/O
card registers are mapped by the hardware to either the bus I/O space
or memory space.  Likewise, the same concept permits the mapping card
memory to either the bus I/O space or memory space.

      Bus interconnection architectures provide a means for
interconnecting various memory and I/O devices to standard busses via
expansion or adapter cards.  Usually two means of addressing the
individual adapter cards are provided:  either memory mapped or I/O
mapped.  For the Micro Channel*, for example, the bus has a set of
parallel ADDRESS lines which carry up to a 32-bit address for the
purpose of selecting registers or memory locations on individual
adapter cards to be written or read.  A control line (Memory/-IO) in
the bus defines whether the address on the ADDRESS lines is to be
regarded as an I/O address or a memory address.  The difference is
that I/O addresses usually address registers on the card, whereas
memory addresses usually address memory space on the card.

      The disclosed method adds flexibility by enabling the card
address mapping to be selectable as either memory or I/O, based on a
control bit stored on the card.  For instance, the IBM Micro Channel
defines the architecture for handling programmable options on the
adapter card by defining a set of Program Option Select (POS)
registers that can be addressed by the operational software (not by
the user application softw...