Browse Prior Art Database

Generalized Event Signalling in Computer I/O

IP.com Disclosure Number: IPCOM000111018D
Original Publication Date: 1994-Feb-01
Included in the Prior Art Database: 2005-Mar-26
Document File: 2 page(s) / 110K

Publishing Venue

IBM

Related People

Cook, RB: AUTHOR [+3]

Abstract

In a computer input/output system in which a device may transfer data to the processor memory buffer out of logical order, means are required for the device to signal that it is not sending further data. These means may be generalized into a signalling system for arbitrary events.

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Generalized Event Signalling in Computer I/O

      In a computer input/output system in which a device may
transfer data to the processor memory buffer out of logical order,
means are required for the device to signal that it is not sending
further data.  These means may be generalized into a signalling
system for arbitrary events.

      There are I/O devices in which it is most efficient to send
data to the channel out of order with respect to the logical
structure understood by the program.  Such devices may store portions
of the record (subrecords) in different mechanisms which may be
accessed concurrently.  In such a device, the order in which the
subrecords are made available for transmission to the channel may be
unpredictable.  According to the conventional art, the control unit
buffers all subrecords until it can transmit them to the channel in
their logical order.  However, this results in increased response
time for the I/O operation, which can affect system-level
performance.

      Subrecords can be transferred to the channel out of logical
order (i.e., in the order in which they become available from the
individual storage mechanisms) if the control unit labels each
subrecord with its logical position in the record, such as a starting
offset from the buffer origin.  An example of such a label is the
relative offset field in transmission frames sent according to the
proposed Fibre Channel American National Standard.

      In the normal I/O art, the control unit signals the completion
of an I/O operation when it has finished transferring all the data
without error.  When data are transferred out of logical order, it is
desirable to provide a signal when a particular buffer (which may
consists of multiple subrecords) has been filled without error, in
addition to the signal which indicates that the entire I/O operation
is complete.

      For simplicity, we describe the mechanism in terms of read
operations in a master-slave processor-device system.  It should be
understood that the principles can be applied to write operations as
well.  The principles are also applicable to peer-to-peer I/O
transfers between processors.  First describe the mechanism in terms
of a simple end signal.  Then, generalize it to an arbitrary event
mechanism.

      A bit, which we term "last-reference", is included in the
channel-level control information about each record transferred.
When the control unit is ready to transfer the last of the subrecords
for a particular logical buffer, it sets the last-reference bit in
the message which initiates transfer of the subrecord.  If the
subrecord is transferred to the channel without error, the channel
stores the subrecord in the buffer and then locks the buffer against
further access.  It then notifies the program, by any of the
well-known mechanisms, such as an interrupt, that the buffer is ready
for processing.  The program can then process each buffer as soon as
it h...