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Electrically Selectable Off Chip Driver with Enhanced Test Capability

IP.com Disclosure Number: IPCOM000111087D
Original Publication Date: 1994-Feb-01
Included in the Prior Art Database: 2005-Mar-26
Document File: 4 page(s) / 141K

Publishing Venue

IBM

Related People

Hovis, WP: AUTHOR [+2]

Abstract

This invention describes a driver with variable output drive control. Although other methods to produce variable rate control exist, this invention proposes a technique which allows flexibility in implementation and can be completely verified in test. The purpose of this scheme was to reduce the logic overhead to while providing the necessary function.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Electrically Selectable Off Chip Driver with Enhanced Test Capability

      This invention describes a driver with variable output drive
control.  Although other methods to produce variable rate control
exist, this invention proposes a technique which allows flexibility
in implementation and can be completely verified in test.  The
purpose of this scheme was to reduce the logic overhead to while
providing the necessary function.

      The concept of this variable or rate controlled driver can be
extended to have any number of independent legs on the output device.
Although each leg does not have to be the same size, we have chosen
to use an example where each leg is identical in size since this
results in test simplicity.  Each leg is enabled by either a test
path or a normal path.  A simple AND OR structure is used to
determine which path is enabled (Fig. 1).  TEST is a true reflection
of a pad input, and NOTTEST is the inversion of that pad.  One and
only one path will be enabled through the AND OR logic block.

      Fig. 2 shows a general architecture for controlling the drivers
for both normal and test modes.  DCON is the input that produces TEST
(a true reflection of DCON) and NOTTEST (an inversion of DCON).
Using a pad/module pin is not necessary, but it is most desirable
from a test standpoint.  In addition to the DCON (Driver CONtrol)
test input, we propose a set of inputs sufficient to decode each leg
independently.  In other words, for the 8 leg example we would
require 3 additional inputs for test mode which can be used to test
each leg independently.  These pins are called TDEC1-3 (for Test
DECode pins 1, 2 and 3).  The pin named CUM (for CUMulative) is used
to test multiple legs enabled at one time if this is desired.  This
function is not required since multiple legs can be enabled in normal
mode.

      For test purposes, the DCON pin is forced active overriding all
normal enable paths to the variable drivers (on the chip or module).
In this mode the tester expects all of the drivers to behave
identically, and the TDEC inputs are used to independently or
cumulatively check all legs of the drivers.  An advantage for testing
a driver with all legs identical in size is that the expect time for
producing valid data would be identical assuming cumulative mode was
not used.  Cumulative testing could be used to insure proper noise
immunity when all drivers have all legs enabled.  Other
implementations including legs with varying size could be used if
desired.  In such a case, some of the test advantages are lost.

      Normal operation would allow any number of legs to be enabled
depending upon system or loading requirements.  In most systems, a
large number of drivers will see the same approximate load for a
given system configuration.  For example, the address or data bus in
a processor complex is such a situation.  It is proposed that such
bus drivers all be controlled from a common set...