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Browse Prior Art Database

Protected Write-Protection

IP.com Disclosure Number: IPCOM000111168D
Original Publication Date: 1994-Feb-01
Included in the Prior Art Database: 2005-Mar-26
Document File: 2 page(s) / 27K

Publishing Venue

IBM

Related People

Christianson, MD: AUTHOR [+4]

Abstract

Two consecutive (back-to-back) microprocessor write cycles are used to properly update a 'write protect' register.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 100% of the total text.

Protected Write-Protection

      Two consecutive (back-to-back) microprocessor write cycles are
used to properly update a 'write protect' register.

      When using a microprocessor and microcode to create a function,
one most be careful to protect where the microprocessor can access in
case of a hardware or microcode fault that is undetected by the
microprocessor itself.  A common way of doing this is to have
protected areas of memory that are protected via a memory control
chip with accesses protect registers.

      When using a register in memory control logic to protect and
detect unwanted accesses to a memory segment via a microprocessor,
one should also require a back-to-back microprocessor write cycle of
the same data to the 'write protect' register before the register is
actually updated.

This removes a couple of possible exposures

1.  microcode mistakenly clearing a 'write protect' bit and
    subsequently corrupting memory.

2.  a microprocessor, mistakenly popping past its stack pointer, may
    erroneously perform write accesses to the memory and/or control
    registers.