Browse Prior Art Database

Double-Density Wire-Bond Integrated Circuit Packaging Technique

IP.com Disclosure Number: IPCOM000111229D
Original Publication Date: 1994-Feb-01
Included in the Prior Art Database: 2005-Mar-26
Document File: 4 page(s) / 120K

Publishing Venue

IBM

Related People

Ciraula, MK: AUTHOR [+5]

Abstract

Traditional wire-bond packaging places each integrated circuit chip in its own package. These packages are then placed on a system board to form complex electronic functions. However, when boards are built in this manner, each individual package requires soldering space, clearance to other packages, etc., which increases the board size and decreases the board density, resulting in higher costs. Consequently, the system designers desire as much circuitry as possible that consumes the least amount of space.

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Double-Density Wire-Bond Integrated Circuit Packaging Technique

      Traditional wire-bond packaging places each integrated circuit
chip in its own package.  These packages are then placed on a system
board to form complex electronic functions.  However, when boards are
built in this manner, each individual package requires soldering
space, clearance to other packages, etc., which increases the board
size and decreases the board density, resulting in higher costs.
Consequently, the system designers desire as much circuitry as
possible that consumes the least amount of space.

      One way to decrease the board density is to place several chips
in a single package using flip-chip technology on an interconnect or
wired substrate.  Inside the multi-chip package the spacings between
chips is much less than that for single-chip packages on a system
board, resulting in reduced board area.  This approach has lent
itself very well to complex functions, such as processor arrays, but
has not been widely adopted for memory chip applications.  Cost has
been a major concern: fully functional modules may require all chips
in the module to operate correctly (spares are possible), which with
a large number of chips may be extremely hard.  For example, consider
a module that contains 16 chips, each of which has a 95% probability
of operating correctly.  Then the overall system probability is
(95%)**16 = 44%!

      As a solution to the reliability problem, a cheaper (but less
dense) approach to increasing the system board density is to
double-up the chips in traditional wire-bond single chip packages.
This technique, dubbed "double-density wire-bond IC packaging",
combines the traditional wire-bonding technology with the newer
flip-chip structure.  The approach lends itself especially well to
memory chips, as will be discussed here, but can be applied to any
chip type.

      Additionally, the technique here illustrates the use of
pre-existing wafers to create the double-density packaging technique.
This results in many potentially useful chips being destroyed during
the process (see the description below).  However, specialized wafers
can be manufactured to eliminate the waste, if desired, at an
increased time and investment cost.  The concept of using
pre-existing wafers is described here to demonstrate the quickest
method possible.

      To begin the process, an additional metal layer is applied to
completed...