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Browse Prior Art Database

Method for Achieving Hardware Interrupt Fairness

IP.com Disclosure Number: IPCOM000111356D
Original Publication Date: 1994-Feb-01
Included in the Prior Art Database: 2005-Mar-26
Document File: 2 page(s) / 97K

Publishing Venue

IBM

Related People

Noto, BJ: AUTHOR [+2]

Abstract

Disclosed is a software method for achieving hardware interrupt fairness despite difficulties associated with interrupt priorities. The device driver of a hardware device having a high interrupt priority is modified to provide appropriate yielding of the CPU, so that a suitable schedule mix of high- and low-level interrupts may be maintained, with lower-level service routines being given an opportunity to service their devices and update the display.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 45% of the total text.

Method for Achieving Hardware Interrupt Fairness

      Disclosed is a software method for achieving hardware interrupt
fairness despite difficulties associated with interrupt priorities.
The device driver of a hardware device having a high interrupt
priority is modified to provide appropriate yielding of the CPU, so
that a suitable schedule mix of high- and low-level interrupts may be
maintained, with lower-level service routines being given an
opportunity to service their devices and update the display.

      This method is applied, for example, to the parallel port
device driver of OS/2*, addressing a problem caused by the rotation
of certain interrupt priorities to give the serial port interrupts
IRQ 3 and IRQ 4 the highest priorities.  This rotation of priorities
moves the hardware interrupts having the lowest five priorities into
a position having the highest five priorities.  The last of these
rotated interrupts, the parallel port interrupt IRQ 7, is thus placed
higher in priority than the keyboard interrupt IRQ 1 and the mouse
interrupt IRQ 12.  In the absence of a method for achieving hardware
interrupt fairness, a user attempting to access, by means of the
keyboard or mouse, a system transmitting a large quantity of data
through the parallel port to a buffered printer, is likely to find
the operation of the keyboard or mouse unresponsive and erratic.

      With the method for achieving hardware interrupt fairness, when
the parallel port device driver receives a large request to print at
entry point 1, it must first calculate the burst data rate and the
CPU yield duration.  The burst data rate is the number of
high-priority hardware interrupts allowed before a yield of the CPU
must occur to allow lower-priority hardware interrupts an opportunity
to service their devices.  Since one byte is transferred per hardware
interrupt, this value may be chosen as the amount of data to transmit
before yielding the CPU.  The CPU yield duration is defined as the
length of time the device driver must refrain from generating
additional high-priority interrupts in an effort to allow the
lower-priority hardware interrupt service routines time to run.
During this time, the parallel port is said to be "exhibiting
fairness."  The CPU yield duration can be calculated using the number
of lower-priority interrupt service routines, the average interrupt
service time, and the frequency of interrupt occurrence.

      At the start of printing, the total data remaining is equal to
the total data for which printing has been requested.  A routine
checks the device to see if it is busy.  If it is not busy, the
routine transmits the first byte of data and then relinquishes its
timeslice, waiting for a hardware interrupt to occur.  Once all the
data in the burst data rate has been transmitted by the hardware
interrupt service routine, the thread of execution, which has been
blocked at the strategy entry point (entry point 1), is run.  If...