Browse Prior Art Database

High Performance BICMOS Compare

IP.com Disclosure Number: IPCOM000111459D
Original Publication Date: 1994-Feb-01
Included in the Prior Art Database: 2005-Mar-26
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Aipperspach, AG: AUTHOR [+4]

Abstract

A high performance logic compare circuit used in computer chip is disclosed. This invention could be used to design very large compare functions.

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High Performance BICMOS Compare

      A high performance logic compare circuit used in computer chip
is disclosed.  This invention could be used to design very large
compare functions.

      When the inputs A0 and A1 are at logic '1', transistors P1, P3,
N5, and N6 turn off, transistors N1, N3, N2, N4 turn on, causing the
base of the bipolar transistor T1 to ground.  Since the bipolar T1
and NFET N7 form an emitter follower circuit, the output 10 is also
pulling to '0'.  When the inputs A0 and A1 are at logic '0',
transistors P1 and P3 turn on, transistors N1, and N3 turn off
pulling the gates of N5 and N6 to Vdd to turn on N5 and N6, pulling
the base of the bipolar T1 and the output 10 to logic level '0'.

      When input A0 is at logic level '1' and A1 is at logic level
'0'.  Pass-gate transistors N2 and P2 turn off.  Transistor P3 and
pass-gate transistors N4 and P4 turn on, pulling the base of the
bipolar transistor T1 and the output 10 to logic level '1'.  When
input A0 is at logic level '0' and A1 is at logic level '1',
pass-gate transistors N4 and P4 turn off.  Transistor P1 and
pass-gate transistors N2 and P2 turn on, pulling the base of the
bipolar transistor T1 and the output 10 to logic level '1'.

      Fig. 1 shows the invented N-Bit Compare BICMOS circuit, and
Fig. 2 shows the invented XOR circuit.