Browse Prior Art Database

Oscillation Control Circuit for Power Save

IP.com Disclosure Number: IPCOM000111500D
Original Publication Date: 1994-Feb-01
Included in the Prior Art Database: 2005-Mar-26
Document File: 2 page(s) / 81K

Publishing Venue

IBM

Related People

Murakami, M: AUTHOR [+2]

Abstract

Disclosed is a circuit for saving the power consumption of HDD (Hard Disk Drive) with AT interface at Sleep Mode. This circuit automatically stops the crystal oscillation for the HDC (Hard Disk Controller) and MPU (Micro Processing Unit) in entering Sleep Mode to minimize the power consumption, and enables the HDD to exit from Sleep Mode even without the crystal oscillation. Therefore, the power consumption can be minimized at Sleep Mode.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Oscillation Control Circuit for Power Save

      Disclosed is a circuit for saving the power consumption of HDD
(Hard Disk Drive) with AT interface at Sleep Mode.  This circuit
automatically stops the crystal oscillation for the HDC (Hard Disk
Controller) and MPU (Micro Processing Unit) in entering Sleep Mode to
minimize the power consumption, and enables the HDD to exit from
Sleep Mode even without the crystal oscillation.  Therefore, the
power consumption can be minimized at Sleep Mode.

      The characteristics of this disclosure are that the crystal
oscillator is automatically stopped by detecting the MPU state clock
stopped at a MPU's power-down mode, and that the reset condition in
exiting from Sleep Mode is released by MPU interrupted by this
circuit.  The reset condition is required to be kept until the
crystal oscillator oscillates steadily, and it can be done by MPU.

      The Figure shows the example of this circuit.  +MPUCLK is the
clock for MPU to work, generated from the crystal oscillation and
also used for this circuit.  +MPUSTCLK is the MPU state clock issued
by MPU, and the frequency is a half of +MPUCLK.  +MPUINT is the
interrupt signal to MPU to inform MPU of exiting from Sleep Mode.
-HSTHRST is the hard reset signal issued by a host to let HDD exit
from Sleep Mode.  -MPUHRSTCLR is the signal issued by MPU to clear
the hard reset condition of HDC.  -HSTSRST and -MPUSRSTCLR have the
same function as -HSTHRST and -MPUHRSTCLR, respectively, except that
they are for the soft reset.  -HDCRST is the signal to keep HDC reset
until the crystal oscillator oscillates steadily in exiting from
Sleep Mode.  +OSCSTOP is the signal to stop the crystal oscillation.
When +OSCSTOP is '1', the oscillation is stopped.

      When HDD is not at Sleep Mode, +MPUSTCLK is running and Q
outputs of D-FF2 and D-FF3 are '0'.  Therefore, 3-NOR output is the
same as +MPUSTCLK.  Also, as the CK input of...