Browse Prior Art Database

Small Computer System Interface Bus Interface Driver/Receiver Control

IP.com Disclosure Number: IPCOM000111504D
Original Publication Date: 1994-Feb-01
Included in the Prior Art Database: 2005-Mar-26
Document File: 6 page(s) / 238K

Publishing Venue

IBM

Related People

Mussenden, GA: AUTHOR

Abstract

Disclosed is a method to simplify and standardize the handshake between a SCSI (Small Computer System Interface) bus controller device, such as an integrated circuit, and a set of combination driver/receiver units external to the controller device. This method may be applied to both the single-ended and differential versions of the SCSI standard. Using this method, it is possible to control the complete set of eighteen or twenty-seven driver/receiver combinations with only three control lines coming from the controller chip.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 23% of the total text.

Small Computer System Interface Bus Interface Driver/Receiver Control

      Disclosed is a method to simplify and standardize the handshake
between a SCSI (Small Computer System Interface) bus controller
device, such as an integrated circuit, and a set of combination
driver/receiver units external to the controller device.  This method
may be applied to both the single-ended and differential versions of
the SCSI standard.  Using this method, it is possible to control the
complete set of eighteen or twenty-seven driver/receiver combinations
with only three control lines coming from the controller chip.

      Only one pin per SCSI signal is required to connect the
controller device to the external driver/receiver combinations.  The
controller device operates with low current open drain/open collector
drivers being dedicated for the Busy, Select, and Reset (BSY, SEL,
and RST) lines.  Using this method, the SCSI DATA bus of the device
and the parity combination drivers must be capable of disabling their
active negation drive transistors whenever the driver/receiver
combination is in the SCSI bus arbitration state, providing a modest
amount of pull-up resistance, such as 5K to 10K ohms.  For the
remaining signals--Acknowledge, Attention, Request, Command/Data,
I/O, and Message--the controller has ordinary logic TRI-STATE*
drivers.  The controller has a receiver for each pin.  All of the
eighteen or twenty-seven SCSI bus signals of the controller device
are active low.  The external driver/receiver combinations are
non-inverting in both the drive and receive directions.

      The driver/receiver combinations are built into data circuits
and control circuits.  A data circuit includes a group of either nine
or eighteen driver/receiver combinations to be used for the data and
parity signals of the SCSI bus.  A control circuit contains the
driver/receiver for all of the SCSI bus control signals, as well as
steering logic for controlling all of the driver/receiver
combinations.

      Fig. 1 shows a driver/receiver combination 10 for use within a
data circuit in a single-ended SCSI application, while Fig. 2 shows a
driver/receiver combination 12 for use within a data circuit in a
differential SCSI application.  Figure 3 shows the connection of a
data circuit 14 and a control circuit 16, between a device 18 with a
SCSI controller and the SCSI bus 20.

      Data circuit 14 has only two pins, the drive enable pin 22 and
the receive enable pin 24, controlling all of the nine or eighteen
driver/receiver combinations 10 or 12.  If these pins are
simultaneously asserted on the device, as indicated through the
output signal of AND gate 26, only the assertion transistors of the
driver and receiver outputs will be enabled;  their negation
transistors will not be enabled.  Thus, the enable signals from pins
22 and 24, and the output of AND gate 26, are provided as inputs to
each data driver/receiver combination 10 or 12.

   ...