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Trace-Directed Program Restructuring for Both Pinned and Pageable Instructions

IP.com Disclosure Number: IPCOM000111507D
Original Publication Date: 1994-Feb-01
Included in the Prior Art Database: 2005-Mar-26
Document File: 2 page(s) / 57K

Publishing Venue

IBM

Related People

Heisch, RR: AUTHOR

Abstract

Trace-Directed Program Restructuring (TDPR) is a well-known technique for improving performance and reducing memory requirements of executable programs. Basically, the idea is to make programs more local by grouping highly executed instruction paths together so as to improve cache, TLB, and real memory page utilization. An address trace is captured while a program is executed for a typical workload to determine where the "hot spots" in the code are located, and the program is then restructured such that these "hot spots" or "hot paths" are placed close together. When the reordered program is run for the same or similar workloads, it typically wastes much less cache space, causes fewer cache collisions, reduces TLB miss rates (all resulting in improved performance), and frees up real memory.

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This is the abbreviated version, containing approximately 59% of the total text.

Trace-Directed Program Restructuring for Both Pinned and Pageable
Instructions

      Trace-Directed Program Restructuring (TDPR) is a well-known
technique for improving performance and reducing memory requirements
of executable programs.  Basically, the idea is to make programs more
local by grouping highly executed instruction paths together so as to
improve cache, TLB, and real memory page utilization.  An address
trace is captured while a program is executed for a typical workload
to determine where the "hot spots" in the code are located, and the
program is then restructured such that these "hot spots" or "hot
paths" are placed close together.  When the reordered program is run
for the same or similar workloads, it typically wastes much less
cache space, causes fewer cache collisions, reduces TLB miss rates
(all resulting in improved performance), and frees up real memory.

      However, some programs contain sections of instructions which
must be pinned (to avoid page faults during execution) as well as
pageable sections such as the AIX* kernel and most of its device
drivers and kernel extensions.  If pinned instructions are moved
during TDPR, then they must remain pinned even if they are executed
together with a sequence of pageable instructions.  Since pinning is
usually supported at the page level only, TDPR becomes impossible (or
at least much less effective) for programs with both pinned and
pageable instruction sections.  Separate pinned and pageab...