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Dissipationless Logic Using Superconducting FETs

IP.com Disclosure Number: IPCOM000111608D
Original Publication Date: 1994-Mar-01
Included in the Prior Art Database: 2005-Mar-26
Document File: 2 page(s) / 92K

Publishing Venue

IBM

Related People

Frank, DJ: AUTHOR [+2]

Abstract

Disclosed are digital electronic circuits composed of superconducting FETs interconnected by superconducting wire, wherein the switching between logic states is done adiabatically. 'Switching adiabatically' in this context is taken to mean: (1) A superconducting FET is only changed from the non-conducting state to the conducting state (i.e., turned on) when the source-to-drain voltage is much less than the supply voltage. (2) The current through a superconducting FET in the 'on' state is never allowed to exceed its superconducting critical current (i.e., the voltage drop across the FET is zero).

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Dissipationless Logic Using Superconducting FETs

      Disclosed are digital electronic circuits composed of
superconducting FETs interconnected by superconducting wire, wherein
the switching between logic states is done adiabatically.  'Switching
adiabatically' in this context is taken to mean:  (1) A
superconducting FET is only changed from the non-conducting state to
the conducting state (i.e., turned on) when the source-to-drain
voltage is much less than the supply voltage.  (2) The current
through a superconducting FET in the 'on' state is never allowed to
exceed its superconducting critical current (i.e., the voltage drop
across the FET is zero).

      This type of logic circuitry enables the implementation of the
ideas of reversible computation [1].  Recently suggested electronic
implementations of reversible computation have used adiabatic
switching and 'electroid switches' [2,3]  which can be implemented in
CMOS, but the resistance of the FETS in their 'on' state and the
resistance of the wiring cause small amounts of dissipation, which
only disappear in the limit of zero frequency.  Using the technique
described here, essentially lossless logic operation can be obtained
at finite frequencies, by entirely removing the resistance.  In the
absence of resistance in the wiring and in the on-state FETs, and
assuming that off-state FETs conduct no current, adiabatic switching
techniques are almost perfectly lossless.  The only losses are due to
uncertainty in the regulation of the voltage levels associated with
the logic states [4], and these losses would be much smaller than the
losses in the resistive mode.  Provided that such logic chips
followed the reversible computation paradigm of not destroying the
last copy of data, they would dissipate essentially no power.  If
data had to be destroyed, it could be destroyed elsewhere, off-chip.

      The technique of this disclosure is to remove the resistance
from these adiabatic switching schemes by using superconducting wire
for the interconnects and superconducting FETs (SFETs) for the FETs.
SFETs have been previously proposed and experimented upon (see [5]
and references therein).  They basically behave like conventional
FETs, but with the addition of the property that they exhibit a
superconducting critical current when the FET is in the on state.
The magnitude of this critical current in an SFET varies with the
gate voltage, increasing with increasing conductivity of the channel.

      T...