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3/4 Rate Matched Spectral Null Code for PR-IV

IP.com Disclosure Number: IPCOM000111989D
Original Publication Date: 1994-Apr-01
Included in the Prior Art Database: 2005-Mar-26
Document File: 2 page(s) / 75K

Publishing Venue

IBM

Related People

Fredrickson, LJ: AUTHOR

Abstract

Disclosed is a code whose spectrum matches the class four partial response (PR4) channel nulls at DC and at the Nyquist frequency. The code is phase-invariant and non-catastrophic, is shown to achieve capacity for a particular constraint graph, inherits certain distance properties, provides tight constraints for timing recovery, has rate 3/4, and is simply decoded in independent four-bit blocks.

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3/4 Rate Matched Spectral Null Code for PR-IV

      Disclosed is a code whose spectrum matches the class four
partial response (PR4) channel nulls at DC and at the Nyquist
frequency.  The code is phase-invariant and non-catastrophic, is
shown to achieve capacity for a particular constraint graph, inherits
certain distance properties, provides tight constraints for timing
recovery, has rate 3/4, and is simply decoded in independent four-bit
blocks.

      The PR4 channel belongs to the class of partial response
channels of the form (1-D)(1+D)&supn.  proposed by Patel and Thapar
[1] as appropriate equalization targets in magnetic saturation
recording.  For PR4, n=1 and the partial response polynomial is given
by PR4(D) = 1 - D 2.

      The modulation code presented creates nulls in the power
spectrum of all sequences of channel input symbols to match the nulls
of PR4.  The code therefore meets the criterion of Karabed and Siegel
[2]  for improved Euclidean distance in an appropriate Viterbi
detector, as well as other desirable properties discussed below.

      System Overview - A modulation encoder receives and translates
arbitrary user bits, which have a value of either zero or one, to
binary coded bits.  An infinite sequence of binary coded bits may be
represented by a sub i, where i=0,1,2, etc.  The user data is
processed in 3-bit blocks which are converted into 4-bit coded blocks
for a code rate of 3/4.  The encoder is a finite state machine.

      The output to the encoder provides the input to a PR4 precoder,
which provides a binary output.  The precoder immunizes the code from
catastrophic error propagation.  The code is also phase-invariant
since the system does not require knowledge of the channel polarity.
The binary output of the precoder may be represented by b sub i = a
sub i XOR b sub <i-2>.

      A level shifter translates the binary symbols b sub i from the
precoder to channel input symbols c sub i.  An input value of zero
will become a "1" value, and an input value of one will be
represented by a "-1".  Initially, the channel is assumed...