Browse Prior Art Database

Technology Independent Technique and System for Addressing DRAMs

IP.com Disclosure Number: IPCOM000112097D
Original Publication Date: 1994-Apr-01
Included in the Prior Art Database: 2005-Mar-26
Document File: 2 page(s) / 79K

Publishing Venue

IBM

Related People

Elliott, JC: AUTHOR [+3]

Abstract

A generalized method for addressing DRAMs independently of technology technology specific row/column partitionings and densities. Software configurable hardware allows flexibility in selection of optimal DRAM characteristics as technology and market conditions change.

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Technology Independent Technique and System for Addressing DRAMs

      A generalized method for addressing DRAMs independently of
technology technology specific row/column partitionings and
densities.  Software configurable hardware allows flexibility in
selection of optimal DRAM characteristics as technology and market
conditions change.

      DRAMs in general are addressed in a sequence where the complete
address is divided into two portions each of which are then serially
clocked into the DRAM via a common bus.  These two address portions
are commonly referred to as the row address and the column address.
Technology specific DRAMs can have differing implementations of how
the complete address is divided between row and column addresses.
For example a 4 MB DRAM which requires a complete address of 22 bits
could be partitioned as a 10 bit row address/12 column address, a 12
bit row address/10 column address, or a 11 bit row address/11 column
address.

      Unfortunately once a DRAM address controller for a technology
specific DRAM is committed to silicon, little can be done accommodate
other DRAM technologies.  This precludes the ability to:

1.  Utilize comparable DRAMs with different row/column configura-
    tions for performance, cost, or availability reasons.

2.  Upgrade to deeper (i.e. - more MB) DRAMs with different row/
    column configurations as these deeper technologies become
    available in the future or as they become more cost effective.

      A technique for solving this problem involves making the
address partitioning between row and column address software
programmable.

      A system which utilizes this technique consists of four key
elements - a Software Accessible Control register, a 1 of n de...