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Browse Prior Art Database

Externally Triggered Soft Stop for Microprocessors

IP.com Disclosure Number: IPCOM000112100D
Original Publication Date: 1994-Apr-01
Included in the Prior Art Database: 2005-Mar-26
Document File: 2 page(s) / 66K

Publishing Venue

IBM

Related People

East, RE: AUTHOR [+2]

Abstract

This disclosure identifies a method for causing a microprocessor, or other computing device, to enter a non-destructive and restartable halt state based on an externally detected trigger. A key aspect of this invention is the definition of a single asynchronous input pin to signal the transition to the "soft-stop" state.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Externally Triggered Soft Stop for Microprocessors

      This disclosure identifies a method for causing a
microprocessor, or other computing device, to enter a non-destructive
and restartable halt state based on an externally detected trigger.
A key aspect of this invention is the definition of a single
asynchronous input pin to signal the transition to the "soft-stop"
state.

      Although asynchronous soft-stop requests have been discussed
previously, the delivery mechanism involved a serial bus command.  As
a result of the latency of the serial bus, an immediate soft-stop was
not possible.  This invention is an improvement in that it can signal
a stop-stop request in a single cycle.  This capability allows
external hardware to trigger useful soft-stops on a wider variety of
external events.

      In general, the ability to soft-stop a processor has proven to
be a useful feature for the bring-up and debug of systems.  Once in
the soft-stop state, the processor state can be scanned out and
analyzed.  Since soft-stop is inherently non-destructive and
restartable, this analysis can often appear non-intrusive to the code
running on the processor.  As a result, this is a flexible and
efficient mechanism for gaining control over the processor as it
executes program code.

      While this function is useful for the bringup and debug of a
processor, it is can also be an important asset for systems that
employ power management features (laptops, etc).  In particular,
external logic can be used to monitor external activity (interrupts,
I/O, etc), and assert the SOFT STOP signal during periods of low (or
no) activity.  The processor responds to the assertion by entering a
quiescent state.  The resulting soft stop reduces power consumption
without destroying and proce...