Dismiss
InnovationQ will be updated on Sunday, Oct. 22, from 10am ET - noon. You may experience brief service interruptions during that time.
Browse Prior Art Database

Scannable Content Addressable Memory Cell

IP.com Disclosure Number: IPCOM000112137D
Original Publication Date: 1994-Apr-01
Included in the Prior Art Database: 2005-Mar-26
Document File: 4 page(s) / 79K

Publishing Venue

IBM

Related People

Buettner, S: AUTHOR [+3]

Abstract

Disclosed is a content addressable memory (CAM) cell with a scan feature built in to allow the data to be scanned into the cell. Using this feature, no sense amplifier or data-out stage is required.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 53% of the total text.

Scannable Content Addressable Memory Cell

      Disclosed is a content addressable memory (CAM) cell with a
scan feature built in to allow the data to be scanned into the cell.
Using this feature, no sense amplifier or data-out stage is required.

      Fig. 1 shows a CAM cell according to the prior art.  The cell
consists of a conventional 6-device cell with an exclusive-or circuit
attached.  A write operation is performed as follows:

o   The bitlines are restored to GND.

o   The data will be amplified in the data-in stage and on the BLT
    node the true signal and on the BLC node the complement signal
    arrive.

o   The wordline rises and the respective information is written into
    the cell.

The cell readout (for test purposes) functions as follows:

o   The bitlines are restored to GND.

o   The data-in stage is deactivated.

o   The wordline rises and either the left or right side of the
    bitline is charged up.

o   If a sufficient sense signal is reached, the sense amplifier will
    be set and the data will be driven to the output.

      The compare mode is activated in the same manner as the write
mode except the wordline is not selected.  (In the case of no match,
the restored compare line is discharged).  As soon as all bits
connected to the compare line are matched, the line will remain up
and an upgoing wordline will be initiated for the adjacent RAM
memory.

      Fig. 2 shows the disclosed cell.  Using the same number of
devices, a scannable CAM cell is obtained.  The shifting is carried
out using the so-called "L2 star" approach.  First, the clock L1
shifts the data via the SI pad into the cell.  In a next phase the L2
clock...