Browse Prior Art Database

Selectively Execute RAMPOST during Initial-Power-Load

IP.com Disclosure Number: IPCOM000112219D
Original Publication Date: 1994-Apr-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 80K

Publishing Venue

IBM

Related People

Lee, VH: AUTHOR

Abstract

Disclosed is a mechanism by which the BootROM of a computer system can selectively execute the system memory power-on self-test (RAMPOST) to reduce the time required to complete the Initial-Power-Load (IPL) of the operating system kernel.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Selectively Execute RAMPOST during Initial-Power-Load

      Disclosed is a mechanism by which the BootROM of a computer
system can selectively execute the system memory power-on self-test
(RAMPOST) to reduce the time required to complete the
Initial-Power-Load (IPL) of the operating system kernel.

      RAMPOST is an important part of the system BootROM.  It is
responsible for checking and initializing the system memory before
they can be used.  The output of RAMPOST is the creation of the
system memory bit map.  This bit map reflects the integrity of the
entire system memory after RAMPOST has been executed.  During the
testing, some data patterns are written to and read back from all
locations of the system memory address where RAM memories are
present.  The objective of these exercises is to check every memory
byte for its capability to store and retrieve data.

      The mechanism to be described requires some available NVRAMs
and an operator key switch with at least two positions.  This
technique aims at providing the system BootROM several paths for
executing RAMPOST based on the position of the key switch or the
content of the RAMPOST flag stored in NVRAM.  The RAMPOST flag should
be in an NVRAM region protected by a valid-checking algorithm such as
Cyclic Redundancy Check (CRC).

The mechanism will have the following paths:

1.  Assume that the key switch has two positions, NORMAL and SECURE.
    When the system BootROM detects that the key switch is in SECURE
    position, all data patterns shall be used by the RAMPOST during
    the testing.  This ensures that there is always a path to test
    the system memory with as many data patterns as the RAMPOST code
    can use in the system BootROM.

2.  When the key switch is in NORMAL position, the system BootROM
    then checks the validity of the RAMPOST flag in NVRAM.  If the
    flag is not valid due to that NVRAM region failing CRC-check,
    this will be treated as if the key switch is in SECURE position.

3.  When the RAMPOST flag is valid, it is used to control the
    execution of the data-pattern test routine.  The RAMPOST flag is
    one byte with these bit-fields:

    a.  PATT_NUM (Bit0 - Bit4):  This the pattern number of the first
        data pattern to be used.  The RAMPOST must have b...