Browse Prior Art Database

Asynchronous Transfer Mode Cell Routing

IP.com Disclosure Number: IPCOM000112236D
Original Publication Date: 1994-Apr-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 4 page(s) / 115K

Publishing Venue

IBM

Related People

Bartoldus, RW: AUTHOR [+5]

Abstract

A technique for routing ATM cells within a multiplexer is disclosed. The technique supports point-to-point and point-to-multipoint communication.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Asynchronous Transfer Mode Cell Routing

      A technique for routing ATM cells within a multiplexer is
disclosed.  The technique supports point-to-point and
point-to-multipoint communication.

      Asynchronous Transfer Mode (ATM) communication is realized
through the transfer of 53 byte cells.  Each cell is composed of a 5
byte header and 48 bytes of data.  The header contains the virtual
path (VP) and virtual circuit (VC) fields which are used to route the
ATM cells through the ATM network.

      In a multiport device such as the ATM concentrator or a switch,
the device must route the ATM cells from an input port to the correct
output port or ports based on the value of the VP/VC as determined by
a previously set up connection.  An ATM cell will be directed to only
one output port in the case of a point-to-point connection or it will
be routed to multiple output ports in the case of a
point-to-multipoint connection.

      The ATM concentrator routes the cells using an efficient
routing table technique.  Logically the table will be represented as
follows:

      Each VP/VC pair will be associated with a bitmap that indicates
which port or ports the cell is destined for.

      An implementation using a flat routing table would use a
minimum amount of memory.  Only 512 words of memory are required
since the number of connections is limited to 512.  However this
technique will not meet cell delay requirements since a search of the
table would be required.

      What is required is an index into the routing table based on
the VP/VC.  The VP is 8 bits.  The VC is 16 bits.  Using the VP/VC as
a direct index into a flat table that includes all VP/VC combinations
would require a table of 2**24 16 bit words.  This technique would be
too expensive to implement.

      Since only 512 connections are allowed through the
concentrator, an indexed table that uses indirection can be used.
The table operates as follows.

      The hardware logic will first read the VP/VC value of the
incoming cell.  The logic will form a 32 bit address using the VP as
an index from the start of the routing table.  The start of the table
will be at a predetermined memory location.

The contents of this memory location will contain one of three
possibilities:

1.  The valid bit set to "0".  This ends the search and indicates
    that the VP/VC is illegal.  This VP/VC is not defined on this
    concentrator.

2.  The valid bit set to "1" and the terminal bit set to "1".  This
    ends the search and indicates that the bits 0 through 12 c...