Browse Prior Art Database

Method for Data Address Breakpoint Detection in a Microprocessor

IP.com Disclosure Number: IPCOM000112251D
Original Publication Date: 1994-Apr-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 65K

Publishing Venue

IBM

Related People

Moore, CR: AUTHOR [+4]

Abstract

The following technique can be used to implement a data address breakpoint (DABP) feature in a microprocessor. The data address breakpoint function is useful as a hardware assist for debugging errant programs. Essentially, a trap to an operating system routine is taken if a load or store attempts to address a particular virtual address.

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This is the abbreviated version, containing approximately 52% of the total text.

Method for Data Address Breakpoint Detection in a Microprocessor

      The following technique can be used to implement a data address
breakpoint (DABP) feature in a microprocessor.  The data address
breakpoint function is useful as a hardware assist for debugging
errant programs.  Essentially, a trap to an operating system routine
is taken if a load or store attempts to address a particular virtual
address.

      Although the concept is simple enough, a microprocessor
implementation may present several complicating factors to the DABP
implementation.  These include:

1.  Operand sizes vary - from single byte to double word (8 bytes).

2.  Unaligned accesses.  Microprocessors have a bus interface of a
    fixed size - typically 1 word or 2 words.  Accesses that cross
    those boundaries require multiple bus operations and are called
    'unaligned accesses'.

3.  Move assist instructions access multiple registers on a load or
    store; therefore, the operand length may be as many as 128 bytes
    for these types of instructions.

4.  Post-increment of the addressing register on a load or store also
    provides a complication, because the increment is conditional on
    whether or not the instruction causes a DAB exception.

This method handles all of the above concerns.

      First, the variable operand size is handled by limiting the
granularity of the hardware check to a double word.  Granularity
finer than a double word may be achieved by software inspection of
the address during the exception handling routine (or debugger...