Browse Prior Art Database

Use of Field-Programmable Gate Array with Fast Memory to Emulate an I/O Interface

IP.com Disclosure Number: IPCOM000112259D
Original Publication Date: 1994-Apr-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 58K

Publishing Venue

IBM

Related People

Meil, GM: AUTHOR

Abstract

This article describes a board design for verifying that an OEM (original equipment manufacturer) microprocessor will function properly with any customer-designed I/O interface. This is accomplished by using a Field-Programmable Gate Array (FPGA) and fast memory to emulate an I/O interface.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Use of Field-Programmable Gate Array with Fast Memory to Emulate
an I/O Interface

      This article describes a board design for verifying that an OEM
(original equipment manufacturer) microprocessor will function
properly with any customer-designed I/O interface.  This is
accomplished by using a Field-Programmable Gate Array (FPGA) and fast
memory to emulate an I/O interface.

      In a typical computer system, a microprocessor has an interface
to a system bus, through which it can transfer data to and from
Input/Output (I/O) devices in the system.  In a given system, the
nature of these accesses depends on the I/O devices installed in the
system and usually on one or more I/O interface devices, which
interface the I/O device or a special I/O bus to the system bus, and
buffer data being transferred.  To verify that an OEM microprocessor,
that may be used in a large variety of systems, will work with any
such I/O interface requires a verification board which can emulate
most I/O interfaces allowed by the processor's specification.

      The verification board contains the microprocessor under test,
an FPGA, and an interleaved fast-SRAM memory subsystem, capable of
providing read data to or accepting write data from the processor on
any bus cycle allowed by the processor specification.  The FPGA
monitors and drives the control signals and address bus from the
processor, and controls the memory subsystem.  The FPGA can be
reprogrammed an unlimited number of times in an automated fashion,
allowing its response to I/O re...