Browse Prior Art Database

Low Overhead Circuit Implementation Allowing AC Walking 1's and Walking O's Patterns

IP.com Disclosure Number: IPCOM000112299D
Original Publication Date: 1994-Apr-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 52K

Publishing Venue

IBM

Related People

Rapoport, S: AUTHOR

Abstract

The previous ABIST macros have been designed to exercise a certain pattern set on the embedded memory macros, but never had the capability of testing the memory with a walking one's pattern at AC speeds. The present disclosure describes a low overhead solution to this problem, because circuits already existing are used.

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This is the abbreviated version, containing approximately 69% of the total text.

Low Overhead Circuit Implementation Allowing AC Walking 1's and Walking
O's Patterns

      The previous ABIST macros have been designed to exercise a
certain pattern set on the embedded memory macros, but never had the
capability of testing the memory with a walking one's pattern at AC
speeds.  The present disclosure describes a low overhead solution to
this problem, because circuits already existing are used.

      The lack of a walking one and walking zero pattern in the
previous ABIST negatively affected the self-test pattern test
coverage.

      The implementation is based on the inclusion of LFSR's (Left
Feedback Shift Register) at the input and the output of the memory.

By programming the LFSRs with a particular pattern of ones and zeros
and writing and reading these patterns as they are written into the
memory it is possible to perform walking patterns on the memory.

      The accompanying Figure is an implementation of the two LFSR's
in a Memory macro which already has a conventional ABIST.  The
control signals ST and WALK control which mode the macro is in;
either system, ABIST, or walking pattern.  In the system mode the
data comes from the Data-In bus.  In the ABIST mode the self-test
data comes from the ABIST.  In the walking pattern the self-test data
from the LFSR1.  The LFSR2 is used to generate the expected data
during the walking pattern.  The walking pattern to be applied to the
memory macro is determined during the scan chain ini...