Browse Prior Art Database

Programmable Bus Interface Architecture

IP.com Disclosure Number: IPCOM000112414D
Original Publication Date: 1994-May-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Barcelo, P: AUTHOR [+3]

Abstract

Described is an apparatus and method for adapting an I/O attachment card to any one of a number of different processor busses. This method requires that only a relatively small number of bus lines be fixed. These fixed lines may include power, ground and a number of lines called processor bus identifiers. In the method as described, four lines are used as processor bus identifiers. These four lines can identify one of sixteen possible processor buses.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 84% of the total text.

Programmable Bus Interface Architecture

      Described is an apparatus and method for adapting an I/O
attachment card to any one of a number of different processor busses.
This method requires that only a relatively small number of bus lines
be fixed.  These fixed lines may include power, ground and a number
of lines called processor bus identifiers.  In the method as
described, four lines are used as processor bus identifiers.  These
four lines can identify one of sixteen possible processor buses.

      Prior attachment cards would have to be redesigned when
attaching to a different processor bus.  The redesign would
significantly increase hardware and development costs.

      The apparatus and method described feature an I/O attachment
card having a bus interface portion which has been designed with
Programmable Logic Devices (PLDs).  The PLDs can be programmed by a
microprocessor using an EPROM or floppy disk.  Moreover, the method
of adapting the I/O attachment card comprises the steps of:

1.  Reading identifier lines on the processor bus by the
    microprocessor.

2.  Selecting an area of EPROM or floppy disk associated with the
    identifier lines.

3.  Programming the PLDs with data contained in the area of EPROM or
    floppy disk selected.

      If the I/O attachment card is removed and placed in a different
system that uses a different processor bus, the above method is
repeated to allow the I/O attachment card to interface wi...