Browse Prior Art Database

Pipelined Cache Snooping Operations in a Multi-Processor System

IP.com Disclosure Number: IPCOM000112483D
Original Publication Date: 1994-May-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 65K

Publishing Venue

IBM

Related People

Elliott, TA: AUTHOR [+4]

Abstract

This invention solves the problem of maintaining data integrity and coherency among multiple caches in a multi-processor system with pipelined cache operations.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Pipelined Cache Snooping Operations in a Multi-Processor System

      This invention solves the problem of maintaining data integrity
and coherency among multiple caches in a multi-processor system with
pipelined cache operations.

      For performance reasons, a processor can be designed with
queuing elements between the execution unit and the cache.  This
allows the execution unit to proceed with execution while queuing
load/store operations to the cache.

      In a multi-processor system, it is sometimes required to gain
exclusivity of a particular sector in memory prior to executing a
particular cache operation.  In these instances, the queuing
positions, logically above the cache, also serve as holding positions
while exclusivity on the system bus is being obtained.

      Once exclusivity of a sector has been obtained on the system
bus, the operations in these queuing elements are logically part of
the processor cache, although the actual operation has not yet been
performed in the cache.  It is also possible that these queued
operations, which now have gained system exclusivity, may not
immediately be granted an arbitration cycle into the cache because of
the cache arbitration.  Therefore, these operations may be delayed
before they are performed in the cache.

      Therein lies the problem.  For in a multi-processor system, it
is possible that another processor is operating on that exact same
sector.  And since the operation has not yet been performed in the
cache, snooping the cache does not represent the proper sector state
and therefore system coherency is jeopardized.

The solution is two fold:

      First, a mechanism is implemented t...