Browse Prior Art Database

Location Zero Reference Detection Mechanism

IP.com Disclosure Number: IPCOM000112501D
Original Publication Date: 1994-May-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 69K

Publishing Venue

IBM

Related People

Mall, M: AUTHOR

Abstract

A definition for a computer hardware mechanism to detect incorrect software references to processor storage location zero is disclosed. The disclosed mechanism is described for the IBM ESA/390* machine architecture but could be applied to other machine architectures.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Location Zero Reference Detection Mechanism

      A definition for a computer hardware mechanism to detect
incorrect software references to processor storage location zero is
disclosed.  The disclosed mechanism is described for the IBM ESA/390*
machine architecture but could be applied to other machine
architectures.

      Incorrect accesses to storage location zero are a frequent
programming error.  This is due to the common programming practice of
setting an area of storage to zero before using the area as a control
block.  If a program later uses a word from the control block which
was not subsequently initialized, the program will incorrectly
attempt to store into, branch to, or fetch from location zero.  These
incorrect uses of location zero cause unpredictable failures in a
program and are difficult to diagnose.  The IBM ESA/390 machine
architecture through the years has included facilities to detect
incorrect stores into location zero and incorrect branches to
location zero.  This disclosure describes a facility which can detect
incorrect fetches from location zero.

      The facility is called the location-zero-reference-detection
facility.  The facility detects when an instruction's 'B' or 'R'
general register is used to reference storage and contains an address
of zero.  (Note the 'B' and 'R' refer to the ESA/390 notation for
denoting registers used in machine instructions.).  When this event
occurs, the facility generates a protection exception program
interrupt.

      Index registers ('X') are not affected by the
location-zero-reference-detection facility.  Use of an address of 0
in an index register is considered a normal occurrence and does not
generate a protection exception interrupt.  When programs executing
in access register address mode, the
location-zero-reference-detection facility will generate a protection
exception interrupt when the entire 64 bit access register/general
register pair i...