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Rework Procedure for Oxide Chemical Mechanical Polish with Open Via's Present

IP.com Disclosure Number: IPCOM000112529D
Original Publication Date: 1994-May-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 59K

Publishing Venue

IBM

Related People

Lorsung, MJ: AUTHOR [+2]

Abstract

Described is a rework technique allowing additional chemical mechanical polishing of oxide after via (contact) definition.

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This is the abbreviated version, containing approximately 74% of the total text.

Rework Procedure for Oxide Chemical Mechanical Polish with Open Via's
Present

      Described is a rework technique allowing additional chemical
mechanical polishing of oxide after via (contact) definition.

      Chemical mechanical (chem-mech) polishing to provide planarized
interlevel dielectric silicon oxide between metal interconnect levels
is becoming standard place on fabricated integrated circuit hardware.
This report describes a rework technique allowing additional
chem-mech polishing of oxide after via (contact) definition.  Since
chem-mech polish utilizes a slurry material to allow the polish
process to occur and this slurry will contaminate unfilled vias, the
slurry must be prevented from filling present via holes.

      The process begins with a substrate defined with typical vias
using a chem-mech and via etch process.  The wafer is coated with a
planarizing novolac resin commonly known as photoresist.  The
photoresist material is spun coated to a thickness of 30,000
angstroms.  A thick layer of photoresist is required to allow
sufficient photoresist material to allow filling of the vias.

      The photoresist is then baked at 200 degrees centigrade for 25
minutes to permit further photoresist planarization.  (Commonly known
in the industry as reflowed resist.)

      The resist is removed using oxygen RIE which removes the bulk
of the photoresist leaving resists in the via wholes.  Proper
endpoint determination is critical in maint...