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Upward Operating Molecular Beam Epitaxy Bipolar Transistors

IP.com Disclosure Number: IPCOM000112532D
Original Publication Date: 1994-May-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 4 page(s) / 106K

Publishing Venue

IBM

Related People

Patton, G: AUTHOR [+2]

Abstract

A technique is described whereby an advanced self-aligned bipolar transistor process (Atx/Ntx compatible) process depends on the structures provided by molecular beam epitaxy (MBE) to grown an NPN profile. By optimizing the upward mode operation of the intrinsic profile, high performance bipolar transistors are produced.

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Upward Operating Molecular Beam Epitaxy Bipolar Transistors

      A technique is described whereby an advanced self-aligned
bipolar transistor process (Atx/Ntx compatible) process depends on
the structures provided by molecular beam epitaxy (MBE) to grown an
NPN profile.  By optimizing the upward mode operation of the
intrinsic profile, high performance bipolar transistors are produced.

      Si-based MBE applications have often been hindered by the
concern for defect creation and propagation of grown-on-patterned
wafers, which is the typical result created by selective oxidation,
implantation and diffusion processes.  Conversely, if the MBE takes
place at the beginning of the device fabrication process on a
non-patterned surface, considerations and problems faced can be
summarized as follows:

Full low temperature isolation must be available.

     Contacting the different layers (base, collector) must be
 achieved through etching.  The lack of selectivity of Reactive Ion
 Etching (RIE) makes it extremely difficult to stop on a very thin, <
 100 nm, base.  This is one of the major reasons for going to an MBE
 process.  Homojunction, heterojunctions are considered separate
 issues.  Using chemical etchants may provide the needed vertical
 selectivity, but will cause undercuts and thus linewidth control
 and edge coverage problems.

     MESA structures have severe topography and are therefore
difficult to interconnect over large areas.

      The concept described herein provides a method of optimizing
the intrinsic profile for upward operation and thereby relieves the
aforementioned etching and topography problems.  A low temperature
deep trench process is still required if MBE growth is preferred on a
blanket substrate.  The conventional Atx or Ntx process can be used
to contact the base from the top, such as the base-collector
junction.  The concept allows for very thin base-widths, avoids
poly-emitter contact resistance problems and can result in improved
density of an Emitter Coupled Logic (ECL) gate layout.

The process involves seven fabrication steps:

1.  Grow the vertical profile on a blanket substrate, with thick
    emitter on the bottom, thin graded base and approximately 100 to
    200 nm of lightly doped collector, as shown in Fig. 1a.  Fig. 1b
    illustrates the vertical profile growth on the blanket substrate.

2.  Next, it is assumed that both a deep and shallow trench can be
    formed in a low temperature process. ...