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Printed Circuit Board Pattern Design Method for Low EMI Noise

IP.com Disclosure Number: IPCOM000112788D
Original Publication Date: 1994-Jun-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Related People

Fujio, S: AUTHOR [+2]

Abstract

This article describes an Electromagnetic Interference (EMI) noise reduction method for printed circuit boards. This method uses only existing simple board technologies and makes a shielding structure to cover the whole or part of the printed circuit board. Its advantage is expecially on highly integrated printed boards.

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Printed Circuit Board Pattern Design Method for Low EMI Noise

      This article describes an Electromagnetic Interference (EMI)
noise reduction method for printed circuit boards.  This method uses
only existing simple board technologies and makes a shielding
structure to cover the whole or part of the printed circuit board.
Its advantage is expecially on highly integrated printed boards.

      The Figure shows the exemplary structure of this method.
Elements (1) and (2) are ground or power plane layers.  These layers
are stitched with plated-through holes (3) placed along the board
edge.  Signal trace (4) layer (5) is placed to be shielded inside
this shielded structure.  With this method, electromagnetic
interference noise is greatly reduced.  This structure also consists
of a transmission line for signal traces and has the effect of
producing an ideal structure for signal transmission within a complex
printed circuit board.

      This structure is also applicable to some shielding or
transmission line structure blocks within a single printed circuit
board to reduce electrical interference noise from the board and/or
signal coupling between the blocks.